From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:32948) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ULF3Q-0006ZK-IU for qemu-devel@nongnu.org; Thu, 28 Mar 2013 11:47:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ULF3N-0008Nn-Ek for qemu-devel@nongnu.org; Thu, 28 Mar 2013 11:47:52 -0400 Received: from mail-ob0-x229.google.com ([2607:f8b0:4003:c01::229]:55102) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ULF3N-0008NR-90 for qemu-devel@nongnu.org; Thu, 28 Mar 2013 11:47:49 -0400 Received: by mail-ob0-f169.google.com with SMTP id oi10so8184903obb.0 for ; Thu, 28 Mar 2013 08:47:48 -0700 (PDT) Sender: Richard Henderson Message-ID: <51546620.1050406@twiddle.net> Date: Thu, 28 Mar 2013 08:47:44 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1364428811-8226-1-git-send-email-aurelien@aurel32.net> <1364428811-8226-3-git-send-email-aurelien@aurel32.net> In-Reply-To: <1364428811-8226-3-git-send-email-aurelien@aurel32.net> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/3] target-i386: enable PCLMULQDQ on Westmere CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: qemu-devel@nongnu.org On 03/27/2013 05:00 PM, Aurelien Jarno wrote: > The PCLMULQDQ instruction has been introduced on the Westmere CPU. > > Signed-off-by: Aurelien Jarno Reviewed-by: Richard Henderson r~