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Sender: Richard Henderson <rth7680@gmail.com>
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Date: Sat, 30 Mar 2013 08:44:55 -0700
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH 0/5] target-i386: add PCLMULQDQ and AES-NI
 instructions
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To: Aurelien Jarno <aurelien@aurel32.net>
Cc: qemu-devel@nongnu.org

On 03/29/2013 07:16 PM, Aurelien Jarno wrote:
> This patch series adds the PCLMULQDQ and AES-NI instructions to the x86
> emulation. Along with the SSE4.1 and SSE4.2 series, this brings the
> instructions emulation to the level of a Westmere CPU.
> 
> It has been tested with the valgrind testsuite and with the kernel
> autotest.
> 
> Changes v1 -> v2:
> - Patch 3: Declare all constant tables as static
> 
> Changes v2 -> v3:
> - Use constant tables from aes.c.
> - Fix AES instructions when source and destination registers are the
>   same.
> 
> Aurelien Jarno (5):
>   target-i386: add pclmulqdq instruction
>   target-i386: enable PCLMULQDQ on Westmere CPU
>   aes: move aes.h from include/block to include/qemu
>   aes: make Td[0-5] and Te[0-5] tables non static
>   target-i386: add AES-NI instructions

All now,

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~