* Re: [Qemu-devel] [PATCH qom-cpu v2 0/7] QOM CPUState, part 9: CPU_COMMON for interrupts [not found] <1361817954-8984-1-git-send-email-afaerber@suse.de> @ 2013-03-05 18:27 ` Andreas Färber [not found] ` <1361817954-8984-8-git-send-email-afaerber@suse.de> 1 sibling, 0 replies; 3+ messages in thread From: Andreas Färber @ 2013-03-05 18:27 UTC (permalink / raw) Cc: Peter Maydell, qemu-devel, Blue Swirl, Michael Walle, Anthony Liguori, Edgar E. Iglesias, Aurélien Jarno, Richard Henderson Am 25.02.2013 19:45, schrieb Andreas Färber: > Andreas Färber (7): > target-cris/helper.c: Update Coding Style > cpu: Move halted and interrupt_request fields to CPUState > exec: Pass CPUState to cpu_reset_interrupt() > cpu: Pass CPUState to cpu_interrupt() > cpu: Replace do_interrupt() by CPUClass::do_interrupt method > target-arm: Override do_interrupt for ARMv7-M profile Applied these to qom-cpu (rebased onto lack of lm32 VMState patch and onto ARM KVM): https://github.com/afaerber/qemu-cpu/commits/qom-cpu Andreas > target-cris: Override do_interrupt for pre-v32 CPU cores > > cpu-exec.c | 70 ++++--- > cpus.c | 6 +- > exec.c | 19 +- > gdbstub.c | 2 +- > hw/alpha_typhoon.c | 18 +- > hw/apic.c | 25 +-- > hw/arm_pic.c | 20 +- > hw/cris_pic_cpu.c | 14 +- > hw/leon3.c | 12 +- > hw/lm32_boards.c | 9 +- > hw/lpc_ich9.c | 2 +- > hw/microblaze_pic_cpu.c | 15 +- > hw/milkymist.c | 9 +- > hw/mips_int.c | 10 +- > hw/omap1.c | 11 +- > hw/openrisc_pic.c | 5 +- > hw/openrisc_timer.c | 4 +- > hw/pc.c | 14 +- > hw/pc_piix.c | 3 +- > hw/ppc.c | 34 +-- > hw/ppc/e500.c | 10 +- > hw/ppc405_uc.c | 4 +- > hw/ppce500_spin.c | 2 +- > hw/puv3.c | 10 +- > hw/pxa2xx.c | 7 +- > hw/pxa2xx_gpio.c | 5 +- > hw/pxa2xx_pic.c | 13 +- > hw/s390x/s390-virtio.c | 14 +- > hw/sh_intc.c | 14 +- > hw/spapr.c | 10 +- > hw/spapr_hcall.c | 2 +- > hw/spapr_rtas.c | 6 +- > hw/sun4m.c | 35 ++-- > hw/sun4u.c | 26 ++- > hw/xen_machine_pv.c | 6 +- > hw/xtensa_pic.c | 12 +- > include/exec/cpu-all.h | 15 -- > include/exec/cpu-defs.h | 2 - > include/qom/cpu.h | 39 ++++ > kvm-all.c | 6 +- > qom/cpu.c | 7 + > target-alpha/cpu-qom.h | 2 + > target-alpha/cpu.c | 1 + > target-alpha/cpu.h | 5 +- > target-alpha/helper.c | 4 +- > target-alpha/translate.c | 3 +- > target-arm/cpu-qom.h | 3 + > target-arm/cpu.c | 15 +- > target-arm/cpu.h | 5 +- > target-arm/helper.c | 23 +- > target-arm/op_helper.c | 4 +- > target-cris/cpu-qom.h | 3 + > target-cris/cpu.c | 9 + > target-cris/cpu.h | 5 +- > target-cris/helper.c | 406 ++++++++++++++++++------------------ > target-cris/translate.c | 3 +- > target-i386/cpu-qom.h | 6 + > target-i386/cpu.c | 3 +- > target-i386/cpu.h | 23 +- > target-i386/helper.c | 18 +- > target-i386/kvm.c | 50 ++--- > target-i386/machine.c | 2 +- > target-i386/misc_helper.c | 21 +- > target-i386/seg_helper.c | 5 +- > target-i386/svm_helper.c | 9 +- > target-lm32/cpu-qom.h | 2 + > target-lm32/cpu.c | 1 + > target-lm32/cpu.h | 5 +- > target-lm32/helper.c | 5 +- > target-lm32/op_helper.c | 4 +- > target-m68k/cpu-qom.h | 2 + > target-m68k/cpu.c | 1 + > target-m68k/cpu.h | 5 +- > target-m68k/helper.c | 10 +- > target-m68k/op_helper.c | 14 +- > target-m68k/qregs.def | 1 - > target-m68k/translate.c | 8 +- > target-microblaze/cpu-qom.h | 2 + > target-microblaze/cpu.c | 1 + > target-microblaze/cpu.h | 5 +- > target-microblaze/helper.c | 9 +- > target-mips/cpu-qom.h | 2 + > target-mips/cpu.c | 2 + > target-mips/cpu.h | 5 +- > target-mips/helper.c | 5 +- > target-mips/op_helper.c | 23 +- > target-mips/translate.c | 4 +- > target-openrisc/cpu.c | 1 + > target-openrisc/cpu.h | 6 +- > target-openrisc/interrupt.c | 4 +- > target-openrisc/interrupt_helper.c | 3 +- > target-openrisc/sys_helper.c | 3 +- > target-ppc/cpu-qom.h | 2 + > target-ppc/cpu.h | 6 +- > target-ppc/excp_helper.c | 34 ++- > target-ppc/helper_regs.h | 11 +- > target-ppc/kvm.c | 16 +- > target-ppc/translate.c | 3 +- > target-ppc/translate_init.c | 1 + > target-s390x/cpu-qom.h | 2 + > target-s390x/cpu.c | 9 +- > target-s390x/cpu.h | 12 +- > target-s390x/helper.c | 19 +- > target-sh4/cpu-qom.h | 2 + > target-sh4/cpu.c | 1 + > target-sh4/cpu.h | 5 +- > target-sh4/helper.c | 13 +- > target-sh4/op_helper.c | 4 +- > target-sparc/cpu-qom.h | 2 + > target-sparc/cpu.c | 2 + > target-sparc/cpu.h | 6 +- > target-sparc/helper.c | 4 +- > target-sparc/int32_helper.c | 4 +- > target-sparc/int64_helper.c | 4 +- > target-unicore32/cpu-qom.h | 2 + > target-unicore32/cpu.c | 1 + > target-unicore32/cpu.h | 5 +- > target-unicore32/helper.c | 5 +- > target-unicore32/softmmu.c | 6 +- > target-xtensa/cpu-qom.h | 2 + > target-xtensa/cpu.c | 1 + > target-xtensa/cpu.h | 1 - > target-xtensa/helper.c | 5 +- > target-xtensa/op_helper.c | 5 +- > translate-all.c | 18 +- > xen-all.c | 10 +- > 126 Dateien geändert, 893 Zeilen hinzugefügt(+), 638 Zeilen entfernt(-) > -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg ^ permalink raw reply [flat|nested] 3+ messages in thread
[parent not found: <1361817954-8984-8-git-send-email-afaerber@suse.de>]
* Re: [Qemu-devel] [PATCH qom-cpu v2 7/7] target-cris: Override do_interrupt for pre-v32 CPU cores [not found] ` <1361817954-8984-8-git-send-email-afaerber@suse.de> @ 2013-04-15 19:50 ` Andreas Färber 2013-04-15 20:09 ` Edgar E. Iglesias 0 siblings, 1 reply; 3+ messages in thread From: Andreas Färber @ 2013-04-15 19:50 UTC (permalink / raw) To: Edgar E. Iglesias; +Cc: qemu-devel Am 25.02.2013 19:45, schrieb Andreas Färber: > Instead of forwarding from cris_cpu_do_interrupt() to do_interruptv10(), > override CPUClass::do_interrupt with crisv10_cpu_do_interrupt() in the > newly introduced class_init functions. > > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > target-cris/cpu-qom.h | 1 + > target-cris/cpu.c | 8 ++++++++ > target-cris/helper.c | 14 ++++++++------ > 3 Dateien geändert, 17 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-) Ping? Edgar, I haven't seen an ack or nack for this yet. If it's okay with you, feel free to apply (rebased version available on my qom-cpu-9 branch that I could alternatively include in a pull if you prefer). Thanks, Andreas > > diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h > index deea1d8..03829bd 100644 > --- a/target-cris/cpu-qom.h > +++ b/target-cris/cpu-qom.h > @@ -74,5 +74,6 @@ static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) > #define ENV_OFFSET offsetof(CRISCPU, env) > > void cris_cpu_do_interrupt(CPUState *cpu); > +void crisv10_cpu_do_interrupt(CPUState *cpu); > > #endif > diff --git a/target-cris/cpu.c b/target-cris/cpu.c > index 95cbf39..67181e5 100644 > --- a/target-cris/cpu.c > +++ b/target-cris/cpu.c > @@ -169,30 +169,38 @@ static void cris_cpu_initfn(Object *obj) > > static void crisv8_cpu_class_init(ObjectClass *oc, void *data) > { > + CPUClass *cc = CPU_CLASS(oc); > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > ccc->vr = 8; > + cc->do_interrupt = crisv10_cpu_do_interrupt; > } > > static void crisv9_cpu_class_init(ObjectClass *oc, void *data) > { > + CPUClass *cc = CPU_CLASS(oc); > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > ccc->vr = 9; > + cc->do_interrupt = crisv10_cpu_do_interrupt; > } > > static void crisv10_cpu_class_init(ObjectClass *oc, void *data) > { > + CPUClass *cc = CPU_CLASS(oc); > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > ccc->vr = 10; > + cc->do_interrupt = crisv10_cpu_do_interrupt; > } > > static void crisv11_cpu_class_init(ObjectClass *oc, void *data) > { > + CPUClass *cc = CPU_CLASS(oc); > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > ccc->vr = 11; > + cc->do_interrupt = crisv10_cpu_do_interrupt; > } > > static void crisv32_cpu_class_init(ObjectClass *oc, void *data) > diff --git a/target-cris/helper.c b/target-cris/helper.c > index e1ef7bc..466cc2f 100644 > --- a/target-cris/helper.c > +++ b/target-cris/helper.c > @@ -45,6 +45,11 @@ void cris_cpu_do_interrupt(CPUState *cs) > env->pregs[PR_ERP] = env->pc; > } > > +void crisv10_cpu_do_interrupt(CPUState *cs) > +{ > + cris_cpu_do_interrupt(cs); > +} > + > int cpu_cris_handle_mmu_fault(CPUCRISState * env, target_ulong address, int rw, > int mmu_idx) > { > @@ -109,9 +114,10 @@ int cpu_cris_handle_mmu_fault(CPUCRISState *env, target_ulong address, int rw, > return r; > } > > -static void do_interruptv10(CPUCRISState *env) > +void crisv10_cpu_do_interrupt(CPUState *cs) > { > - D(CPUState *cs = CPU(cris_env_get_cpu(env))); > + CRISCPU *cpu = CRIS_CPU(cs); > + CPUCRISState *env = &cpu->env; > int ex_vec = -1; > > D_LOG("exception index=%d interrupt_req=%d\n", > @@ -171,10 +177,6 @@ void cris_cpu_do_interrupt(CPUState *cs) > CPUCRISState *env = &cpu->env; > int ex_vec = -1; > > - if (env->pregs[PR_VR] < 32) { > - return do_interruptv10(env); > - } > - > D_LOG("exception index=%d interrupt_req=%d\n", > env->exception_index, > cs->interrupt_request); -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH qom-cpu v2 7/7] target-cris: Override do_interrupt for pre-v32 CPU cores 2013-04-15 19:50 ` [Qemu-devel] [PATCH qom-cpu v2 7/7] target-cris: Override do_interrupt for pre-v32 CPU cores Andreas Färber @ 2013-04-15 20:09 ` Edgar E. Iglesias 0 siblings, 0 replies; 3+ messages in thread From: Edgar E. Iglesias @ 2013-04-15 20:09 UTC (permalink / raw) To: Andreas Färber; +Cc: qemu-devel On Mon, Apr 15, 2013 at 09:50:09PM +0200, Andreas Färber wrote: > Am 25.02.2013 19:45, schrieb Andreas Färber: > > Instead of forwarding from cris_cpu_do_interrupt() to do_interruptv10(), > > override CPUClass::do_interrupt with crisv10_cpu_do_interrupt() in the > > newly introduced class_init functions. > > > > Signed-off-by: Andreas Färber <afaerber@suse.de> > > --- > > target-cris/cpu-qom.h | 1 + > > target-cris/cpu.c | 8 ++++++++ > > target-cris/helper.c | 14 ++++++++------ > > 3 Dateien geändert, 17 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-) > > Ping? Edgar, I haven't seen an ack or nack for this yet. If it's okay > with you, feel free to apply (rebased version available on my qom-cpu-9 > branch that I could alternatively include in a pull if you prefer). Sorry for the delay, It looks nice to me. Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Thanks, Edgar > > Thanks, > Andreas > > > > > diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h > > index deea1d8..03829bd 100644 > > --- a/target-cris/cpu-qom.h > > +++ b/target-cris/cpu-qom.h > > @@ -74,5 +74,6 @@ static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) > > #define ENV_OFFSET offsetof(CRISCPU, env) > > > > void cris_cpu_do_interrupt(CPUState *cpu); > > +void crisv10_cpu_do_interrupt(CPUState *cpu); > > > > #endif > > diff --git a/target-cris/cpu.c b/target-cris/cpu.c > > index 95cbf39..67181e5 100644 > > --- a/target-cris/cpu.c > > +++ b/target-cris/cpu.c > > @@ -169,30 +169,38 @@ static void cris_cpu_initfn(Object *obj) > > > > static void crisv8_cpu_class_init(ObjectClass *oc, void *data) > > { > > + CPUClass *cc = CPU_CLASS(oc); > > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > > > ccc->vr = 8; > > + cc->do_interrupt = crisv10_cpu_do_interrupt; > > } > > > > static void crisv9_cpu_class_init(ObjectClass *oc, void *data) > > { > > + CPUClass *cc = CPU_CLASS(oc); > > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > > > ccc->vr = 9; > > + cc->do_interrupt = crisv10_cpu_do_interrupt; > > } > > > > static void crisv10_cpu_class_init(ObjectClass *oc, void *data) > > { > > + CPUClass *cc = CPU_CLASS(oc); > > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > > > ccc->vr = 10; > > + cc->do_interrupt = crisv10_cpu_do_interrupt; > > } > > > > static void crisv11_cpu_class_init(ObjectClass *oc, void *data) > > { > > + CPUClass *cc = CPU_CLASS(oc); > > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > > > ccc->vr = 11; > > + cc->do_interrupt = crisv10_cpu_do_interrupt; > > } > > > > static void crisv32_cpu_class_init(ObjectClass *oc, void *data) > > diff --git a/target-cris/helper.c b/target-cris/helper.c > > index e1ef7bc..466cc2f 100644 > > --- a/target-cris/helper.c > > +++ b/target-cris/helper.c > > @@ -45,6 +45,11 @@ void cris_cpu_do_interrupt(CPUState *cs) > > env->pregs[PR_ERP] = env->pc; > > } > > > > +void crisv10_cpu_do_interrupt(CPUState *cs) > > +{ > > + cris_cpu_do_interrupt(cs); > > +} > > + > > int cpu_cris_handle_mmu_fault(CPUCRISState * env, target_ulong address, int rw, > > int mmu_idx) > > { > > @@ -109,9 +114,10 @@ int cpu_cris_handle_mmu_fault(CPUCRISState *env, target_ulong address, int rw, > > return r; > > } > > > > -static void do_interruptv10(CPUCRISState *env) > > +void crisv10_cpu_do_interrupt(CPUState *cs) > > { > > - D(CPUState *cs = CPU(cris_env_get_cpu(env))); > > + CRISCPU *cpu = CRIS_CPU(cs); > > + CPUCRISState *env = &cpu->env; > > int ex_vec = -1; > > > > D_LOG("exception index=%d interrupt_req=%d\n", > > @@ -171,10 +177,6 @@ void cris_cpu_do_interrupt(CPUState *cs) > > CPUCRISState *env = &cpu->env; > > int ex_vec = -1; > > > > - if (env->pregs[PR_VR] < 32) { > > - return do_interruptv10(env); > > - } > > - > > D_LOG("exception index=%d interrupt_req=%d\n", > > env->exception_index, > > cs->interrupt_request); > > -- > SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany > GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg ^ permalink raw reply [flat|nested] 3+ messages in thread
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2013-03-05 18:27 ` [Qemu-devel] [PATCH qom-cpu v2 0/7] QOM CPUState, part 9: CPU_COMMON for interrupts Andreas Färber
[not found] ` <1361817954-8984-8-git-send-email-afaerber@suse.de>
2013-04-15 19:50 ` [Qemu-devel] [PATCH qom-cpu v2 7/7] target-cris: Override do_interrupt for pre-v32 CPU cores Andreas Färber
2013-04-15 20:09 ` Edgar E. Iglesias
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