From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:51878) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UUIGK-0004O5-MA for qemu-devel@nongnu.org; Mon, 22 Apr 2013 11:02:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UUIGJ-0000Dz-AD for qemu-devel@nongnu.org; Mon, 22 Apr 2013 11:02:36 -0400 Received: from cantor2.suse.de ([195.135.220.15]:34236 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UUIGJ-0000Dt-0b for qemu-devel@nongnu.org; Mon, 22 Apr 2013 11:02:35 -0400 Message-ID: <51755109.6020007@suse.de> Date: Mon, 22 Apr 2013 17:02:33 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1366063976-4909-1-git-send-email-imammedo@redhat.com> <1366063976-4909-13-git-send-email-imammedo@redhat.com> In-Reply-To: <1366063976-4909-13-git-send-email-imammedo@redhat.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 12/16] target-i386: cpu: attach ICC bus to CPU on its creation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: aliguori@us.ibm.com, ehabkost@redhat.com, mst@redhat.com, jan.kiszka@siemens.com, claudio.fontana@huawei.com, qemu-devel@nongnu.org, aderumier@odiso.com, lcapitulino@redhat.com, jfrei@linux.vnet.ibm.com, yang.z.zhang@intel.com, pbonzini@redhat.com, lig.fnst@cn.fujitsu.com, rth@twiddle.net Am 16.04.2013 00:12, schrieb Igor Mammedov: > ... during startup, so it would be possible to unplug it later > and set bus_type to TYPE_ICC_BUS for X86CPU type to make device_add > attach hotplugged CPU to ICC bus. >=20 > Signed-off-by: Igor Mammedov Reviewed-by: Andreas F=E4rber But still one question... > --- > target-i386/cpu.c | 7 +++++++ > 1 file changed, 7 insertions(+) >=20 > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 6d6c527..3b5f90b 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -41,6 +41,7 @@ > #endif > =20 > #include "sysemu/sysemu.h" > +#include "hw/i386/icc_bus.h" > #ifndef CONFIG_USER_ONLY > #include "hw/xen/xen.h" > #include "hw/sysbus.h" > @@ -1609,6 +1610,7 @@ X86CPU *cpu_x86_create(const char *cpu_model, Err= or **errp) > gchar **model_pieces; > char *name, *features; > Error *error =3D NULL; > + Object *icc_bus =3D object_resolve_path_type("icc-bus", TYPE_ICC_B= US, NULL); > =20 > model_pieces =3D g_strsplit(cpu_model, ",", 2); > if (!model_pieces[0]) { > @@ -1619,6 +1621,10 @@ X86CPU *cpu_x86_create(const char *cpu_model, Er= ror **errp) > features =3D model_pieces[1]; > =20 > cpu =3D X86_CPU(object_new(TYPE_X86_CPU)); > + if (icc_bus) { > + qdev_set_parent_bus(DEVICE(cpu), BUS(icc_bus)); > + object_unref(OBJECT(cpu)); > + } > env =3D &cpu->env; > env->cpu_model_str =3D cpu_model; > =20 You seem to be avoiding making lack of icc-bus an error although you add it for both PC and q35 PC - which non-ICC use cases are you thinking of? Andreas > @@ -2330,6 +2336,7 @@ static void x86_cpu_common_class_init(ObjectClass= *oc, void *data) > =20 > xcc->parent_realize =3D dc->realize; > dc->realize =3D x86_cpu_realizefn; > + dc->bus_type =3D TYPE_ICC_BUS; > =20 > xcc->parent_reset =3D cc->reset; > cc->reset =3D x86_cpu_reset; >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg