From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58011) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UUIWF-0007Kg-SG for qemu-devel@nongnu.org; Mon, 22 Apr 2013 11:19:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UUIWC-0006US-Hy for qemu-devel@nongnu.org; Mon, 22 Apr 2013 11:19:03 -0400 Received: from cantor2.suse.de ([195.135.220.15]:35054 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UUIWC-0006U4-2R for qemu-devel@nongnu.org; Mon, 22 Apr 2013 11:19:00 -0400 Message-ID: <517554E2.7000401@suse.de> Date: Mon, 22 Apr 2013 17:18:58 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1366063976-4909-1-git-send-email-imammedo@redhat.com> <1366063976-4909-15-git-send-email-imammedo@redhat.com> In-Reply-To: <1366063976-4909-15-git-send-email-imammedo@redhat.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 14/16] target-i386: move APIC to ICC bus List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: aliguori@us.ibm.com, ehabkost@redhat.com, mst@redhat.com, jan.kiszka@siemens.com, claudio.fontana@huawei.com, qemu-devel@nongnu.org, aderumier@odiso.com, lcapitulino@redhat.com, jfrei@linux.vnet.ibm.com, yang.z.zhang@intel.com, pbonzini@redhat.com, lig.fnst@cn.fujitsu.com, rth@twiddle.net Am 16.04.2013 00:12, schrieb Igor Mammedov: > ... to allow it to be hotplugged >=20 > * map APIC's mmio at board level if it is present > * do not register mmio region for each APIC, since > only one is used/mapped >=20 > Signed-off-by: Igor Mammedov > --- > hw/cpu/icc_bus.c | 15 ++++++++++++++- > hw/i386/kvmvapic.c | 1 + > hw/i386/pc.c | 20 +++++++++++++++++--- > hw/intc/apic_common.c | 17 ++++++++++++----- > include/hw/i386/apic_internal.h | 6 +++--- > include/hw/i386/icc_bus.h | 2 ++ > target-i386/cpu.c | 16 +++------------- > 7 files changed, 52 insertions(+), 25 deletions(-) >=20 > diff --git a/hw/cpu/icc_bus.c b/hw/cpu/icc_bus.c > index 00b9be3..5078c38 100644 > --- a/hw/cpu/icc_bus.c > +++ b/hw/cpu/icc_bus.c > @@ -62,13 +62,26 @@ static const TypeInfo icc_device_info =3D { > =20 > typedef struct ICCBridgeState { > SysBusDevice busdev; > + MemoryRegion apic_container; > } ICCBridgeState; > #define ICC_BRIGDE(obj) OBJECT_CHECK(ICCBridgeState, (obj), TYPE_ICC_B= RIDGE) > =20 > =20 > static void icc_bridge_initfn(Object *obj) > { > - qbus_create(TYPE_ICC_BUS, DEVICE(obj), "icc-bus"); > + ICCBridgeState *s =3D ICC_BRIGDE(obj); > + SysBusDevice *sb =3D SYS_BUS_DEVICE(obj); > + ICCBus *ibus; > + > + ibus =3D ICC_BUS(qbus_create(TYPE_ICC_BUS, DEVICE(obj), "icc-bus")= ); qbus_create_inplace() as suggested on ICC patch would allow to access it through state field. > + > + /* Do not change order of registering regions, > + * APIC must be first registered region, board maps it by 0 index > + */ > + memory_region_init(&s->apic_container, "icc-apic-container", > + APIC_SPACE_SIZE); > + sysbus_init_mmio(sb, &s->apic_container); > + ibus->apic_address_space =3D &s->apic_container; > } > =20 > static const TypeInfo icc_bridge_info =3D { > diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c > index 3a10c07..5b558aa 100644 > --- a/hw/i386/kvmvapic.c > +++ b/hw/i386/kvmvapic.c > @@ -12,6 +12,7 @@ > #include "sysemu/cpus.h" > #include "sysemu/kvm.h" > #include "hw/i386/apic_internal.h" > +#include "hw/sysbus.h" > =20 > #define VAPIC_IO_PORT 0x7e > =20 I take it, this is necessary due to dropping hw/sysbus.h include in cpu.c? Might be split out then since patch is rather large already. > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index cb57878..31b5294 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -52,6 +52,7 @@ > #include "sysemu/arch_init.h" > #include "qemu/bitmap.h" > #include "qemu/config-file.h" > +#include "hw/i386/icc_bus.h" > =20 > /* debug PC/ISA interrupts */ > //#define DEBUG_IRQ > @@ -889,13 +890,13 @@ void pc_acpi_smi_interrupt(void *opaque, int irq,= int level) > } > } > =20 > -static void pc_new_cpu(const char *cpu_model, int64_t apic_id, Error *= *errp) > +static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id, Erro= r **errp) > { > X86CPU *cpu; > =20 > cpu =3D cpu_x86_create(cpu_model, errp); > if (!cpu) { > - return; > + return cpu; > } > =20 > object_property_set_int(OBJECT(cpu), apic_id, "apic-id", errp); > @@ -904,14 +905,18 @@ static void pc_new_cpu(const char *cpu_model, int= 64_t apic_id, Error **errp) > if (error_is_set(errp)) { > if (cpu !=3D NULL) { > object_unref(OBJECT(cpu)); > + cpu =3D NULL; > } > } > + return cpu; > } > =20 Squash this into the pc_new_cpu() introduction? > void pc_cpus_init(const char *cpu_model) > { > int i; > + X86CPU *cpu =3D NULL; > Error *error =3D NULL; > + SysBusDevice *ib; icc maybe? Anything that more's comprehensible. ;) > =20 > /* init CPUs */ > if (cpu_model =3D=3D NULL) { > @@ -922,14 +927,23 @@ void pc_cpus_init(const char *cpu_model) > #endif > } > =20 > + ib =3D SYS_BUS_DEVICE(object_resolve_path_type("icc-bridge", > + TYPE_ICC_BRIDGE, NULL= )); > + > for (i =3D 0; i < smp_cpus; i++) { > - pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), &error); > + cpu =3D pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), &= error); (Here it would've been nice too but would lead to assigned-but-not-used warnings.) > if (error) { > fprintf(stderr, "%s\n", error_get_pretty(error)); > error_free(error); > exit(1); > } > } > + > + /* map APIC MMIO area if CPU has APIC */ > + if (cpu && cpu->env.apic_state) { > + /* XXX: what if the base changes? */ > + sysbus_mmio_map_overlap(ib, 0, APIC_DEFAULT_ADDRESS, 0x1000); > + } > } > =20 > void pc_acpi_init(const char *default_dsdt) > diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c > index e0ae07a..39396f1 100644 > --- a/hw/intc/apic_common.c > +++ b/hw/intc/apic_common.c > @@ -21,6 +21,8 @@ > #include "hw/i386/apic_internal.h" > #include "trace.h" > #include "sysemu/kvm.h" > +#include "hw/qdev.h" > +#include "hw/sysbus.h" > =20 > static int apic_irq_delivered; > bool apic_report_tpr_access; > @@ -282,12 +284,14 @@ static int apic_load_old(QEMUFile *f, void *opaqu= e, int version_id) > return 0; > } > =20 > -static int apic_init_common(SysBusDevice *dev) > +static int apic_init_common(ICCDevice *dev) Instead of mechanically replacing SysBusDevice with ICCDevice in qdev init functions, please change to realize. Could be its own prepended patch if you prefer. > { > APICCommonState *s =3D APIC_COMMON(dev); > + DeviceState *d =3D DEVICE(dev); > APICCommonClass *info; > static DeviceState *vapic; > static int apic_no; > + static bool mmio_registered; > =20 > if (apic_no >=3D MAX_APICS) { > return -1; > @@ -296,8 +300,11 @@ static int apic_init_common(SysBusDevice *dev) > =20 > info =3D APIC_COMMON_GET_CLASS(s); > info->init(s); > - > - sysbus_init_mmio(dev, &s->io_memory); > + if (!mmio_registered) { > + MemoryRegion *as =3D ICC_BUS(d->parent_bus)->apic_address_spac= e; > + memory_region_add_subregion(as, 0, &s->io_memory); > + mmio_registered =3D true; > + } > =20 > /* Note: We need at least 1M to map the VAPIC option ROM */ > if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK && > @@ -375,7 +382,7 @@ static Property apic_properties_common[] =3D { > =20 > static void apic_common_class_init(ObjectClass *klass, void *data) > { > - SysBusDeviceClass *sc =3D SYS_BUS_DEVICE_CLASS(klass); > + ICCDeviceClass *sc =3D ICC_DEVICE_CLASS(klass); idc please. :) > DeviceClass *dc =3D DEVICE_CLASS(klass); > =20 > dc->vmsd =3D &vmstate_apic_common; > @@ -387,7 +394,7 @@ static void apic_common_class_init(ObjectClass *kla= ss, void *data) > =20 > static const TypeInfo apic_common_type =3D { > .name =3D TYPE_APIC_COMMON, > - .parent =3D TYPE_SYS_BUS_DEVICE, > + .parent =3D TYPE_ICC_DEVICE, > .instance_size =3D sizeof(APICCommonState), > .class_size =3D sizeof(APICCommonClass), > .class_init =3D apic_common_class_init, > diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_int= ernal.h > index aac6290..05acf4b 100644 > --- a/include/hw/i386/apic_internal.h > +++ b/include/hw/i386/apic_internal.h > @@ -21,7 +21,7 @@ > #define QEMU_APIC_INTERNAL_H > =20 > #include "exec/memory.h" > -#include "hw/sysbus.h" > +#include "hw/i386/icc_bus.h" > #include "qemu/timer.h" > =20 > /* APIC Local Vector Table */ > @@ -78,7 +78,7 @@ typedef struct APICCommonState APICCommonState; > =20 > typedef struct APICCommonClass > { > - SysBusDeviceClass parent_class; > + ICCDeviceClass parent_class; > =20 > void (*init)(APICCommonState *s); > void (*set_base)(APICCommonState *s, uint64_t val); > @@ -92,7 +92,7 @@ typedef struct APICCommonClass > } APICCommonClass; > =20 > struct APICCommonState { > - SysBusDevice busdev; > + ICCDevice busdev; parent_obj please, while at it. > =20 > MemoryRegion io_memory; > X86CPU *cpu; > diff --git a/include/hw/i386/icc_bus.h b/include/hw/i386/icc_bus.h > index aa30e0c..1b07619 100644 > --- a/include/hw/i386/icc_bus.h > +++ b/include/hw/i386/icc_bus.h > @@ -22,6 +22,7 @@ > #ifndef ICC_BUS_H > #define ICC_BUS_H > =20 > +#include "exec/memory.h" > #include "hw/qdev-core.h" > =20 > #define TYPE_ICC_BUS "icc-bus" > @@ -29,6 +30,7 @@ > #ifndef CONFIG_USER_ONLY > typedef struct ICCBus { > BusState qbus; > + MemoryRegion *apic_address_space; > } ICCBus; > #define ICC_BUS(obj) OBJECT_CHECK(ICCBus, (obj), TYPE_ICC_BUS) > =20 > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 3b5f90b..bdac6ea 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -41,10 +41,10 @@ > #endif > =20 > #include "sysemu/sysemu.h" > +#include "hw/qdev-properties.h" > #include "hw/i386/icc_bus.h" > #ifndef CONFIG_USER_ONLY > #include "hw/xen/xen.h" > -#include "hw/sysbus.h" > #include "hw/i386/apic_internal.h" > #endif > =20 > @@ -2111,6 +2111,7 @@ static void mce_init(X86CPU *cpu) > static void x86_cpu_apic_create(X86CPU *cpu, Error **errp) > { > CPUX86State *env =3D &cpu->env; > + DeviceState *dev =3D DEVICE(cpu); > APICCommonState *apic; > const char *apic_type =3D "apic"; > =20 > @@ -2120,7 +2121,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Erro= r **errp) > apic_type =3D "xen-apic"; > } > =20 > - env->apic_state =3D qdev_try_create(NULL, apic_type); > + env->apic_state =3D qdev_try_create(dev->parent_bus, apic_type); qdev_get_parent_bus() according to header comment. > if (env->apic_state =3D=3D NULL) { > error_setg(errp, "APIC device '%s' could not be created", apic= _type); > return; > @@ -2137,7 +2138,6 @@ static void x86_cpu_apic_create(X86CPU *cpu, Erro= r **errp) > static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) > { > CPUX86State *env =3D &cpu->env; > - static int apic_mapped; > =20 > if (env->apic_state =3D=3D NULL) { > return; > @@ -2148,16 +2148,6 @@ static void x86_cpu_apic_realize(X86CPU *cpu, Er= ror **errp) > object_get_typename(OBJECT(env->apic_state))); > return; > } > - > - /* XXX: mapping more APICs at the same memory location */ > - if (apic_mapped =3D=3D 0) { > - /* NOTE: the APIC is directly connected to the CPU - it is not > - on the global memory bus. */ > - /* XXX: what if the base changes? */ > - sysbus_mmio_map_overlap(SYS_BUS_DEVICE(env->apic_state), 0, > - APIC_DEFAULT_ADDRESS, 0x1000); > - apic_mapped =3D 1; > - } > } > #else > static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) >=20 Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg