From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:49556) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UUywa-0000Oz-LI for qemu-devel@nongnu.org; Wed, 24 Apr 2013 08:37:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UUywY-00047x-Vq for qemu-devel@nongnu.org; Wed, 24 Apr 2013 08:37:04 -0400 Received: from mail-qc0-x236.google.com ([2607:f8b0:400d:c01::236]:39917) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UUywY-00047S-Rp for qemu-devel@nongnu.org; Wed, 24 Apr 2013 08:37:02 -0400 Received: by mail-qc0-f182.google.com with SMTP id k19so910945qcs.27 for ; Wed, 24 Apr 2013 05:37:00 -0700 (PDT) Sender: Paolo Bonzini Message-ID: <5177D1DE.10803@redhat.com> Date: Wed, 24 Apr 2013 14:36:46 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1366804881-553-1-git-send-email-david@gibson.dropbear.id.au> <1366804881-553-2-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1366804881-553-2-git-send-email-david@gibson.dropbear.id.au> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 1/5] pci: Simpler implementation of PCI_COMMAND_MASTER bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: aik@ozlabs.ru, alex.williamson@redhat.com, qemu-devel@nongnu.org Il 24/04/2013 14:01, David Gibson ha scritto: > In commit 1c380f9460522f32c8dd2577b2a53d518ec91c6d "pci: honor > PCI_COMMAND_MASTER" the PCI_COMMAND_MASTER bit of the PCI command register > was implemented by toggling the enable bit on a memory region alias > interposed between the PCI device's dma address space and the main > system memory region. > > Introducing an extra alias region for every PCI device just to implement > that bit seems like serious overkill. Furthermore, it doesn't work when > there's a (guest side) iommu present, since that uses a different path for > constructing the PCI device's dma address space. > > This patch removes the aliased window, instead implementing > PCI_COMMAND_MASTER with tests in the PCI DMA functions. > > Signed-off-by: David Gibson This doesn't work. You have no guarantee that PCI devices use the PCI DMA functions. The device could just pass the DMAContext to another function, and indeed the OHCI controller does exactly that. This will be even simpler after IOMMU/DMAContext are also unified in the AddressSpace framework. Paolo