From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:56924) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UX9tK-0001HG-Pu for qemu-devel@nongnu.org; Tue, 30 Apr 2013 08:42:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UX9tI-0007KL-SK for qemu-devel@nongnu.org; Tue, 30 Apr 2013 08:42:42 -0400 Received: from cantor2.suse.de ([195.135.220.15]:38966 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UX9kc-0004Qi-HI for qemu-devel@nongnu.org; Tue, 30 Apr 2013 08:33:42 -0400 Message-ID: <517FBA25.60404@suse.de> Date: Tue, 30 Apr 2013 14:33:41 +0200 From: Alexander Graf MIME-Version: 1.0 References: <1367303766-9526-1-git-send-email-john.rigby@linaro.org> <517FAE24.1040000@suse.de> <517FB25F.7070501@suse.de> In-Reply-To: <517FB25F.7070501@suse.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2 01/12] ARM: Export cpu_env List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Cc: Peter Crosthwaite , Peter Maydell , John Rigby , qemu-devel , "Edgar E. Iglesias" On 04/30/2013 02:00 PM, Andreas F=C3=A4rber wrote: > Am 30.04.2013 13:54, schrieb Alexander Graf: >> Am 30.04.2013 um 13:42 schrieb Andreas F=C3=A4rber: >> >>> Am 30.04.2013 08:36, schrieb John Rigby: >>>> From: Alexander Graf >>>> >>>> The cpu_env tcg variable will be used by both the AArch32 and AArch6= 4 >>>> handling code. Unstaticify it, so that both sides can make use of it= . >>>> >>>> Signed-off-by: Alexander Graf > [...] >>>> --- >>>> target-arm/translate.c | 2 +- >>>> target-arm/translate.h | 2 ++ >>>> 2 files changed, 3 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/target-arm/translate.c b/target-arm/translate.c >>>> index 675773a..36537bd 100644 >>>> --- a/target-arm/translate.c >>>> +++ b/target-arm/translate.c >>>> @@ -59,7 +59,7 @@ static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE= ]; >>>> #define DISAS_WFI 4 >>>> #define DISAS_SWI 5 >>>> >>>> -static TCGv_ptr cpu_env; >>>> +TCGv_ptr cpu_env; >>>> /* We reuse the same 64-bit temporaries for efficiency. */ >>>> static TCGv_i64 cpu_V0, cpu_V1, cpu_M0; >>>> static TCGv_i32 cpu_R[16]; >>>> diff --git a/target-arm/translate.h b/target-arm/translate.h >>>> index e727bc6..8ba1433 100644 >>>> --- a/target-arm/translate.h >>>> +++ b/target-arm/translate.h >>>> @@ -24,4 +24,6 @@ typedef struct DisasContext { >>>> int vec_stride; >>>> } DisasContext; >>>> >>>> +extern TCGv_ptr cpu_env; >>>> + >>>> #endif /* TARGET_ARM_TRANSLATE_H */ >>> Alex, have you checked whether the variable can be placed in qom/cpu.= c >>> instead once for all targets? I'd hope that would be possible with an >>> appropriate typedef (since target_long size etc. are unknown there). >> I would prefer to keep the translation context separate from the execu= tion context. > Not sure if you understood my point? Exposing cpu_env from target-arm > would seem to torpedo our efforts to link target-arm and, e.g., > target-microblaze together, since they all have cpu_env. I don't really > care if it's qom/cpu.c or tcg/shared.c or renaming to arm_cpu_env. :) I see :). I was more coming from the angle of "we should be able to=20 conditionally not compile TCG code". So anything that is TCG translation=20 code and respective defines around it should be contained inside of itsel= f. Alex