From: Richard Henderson <rth@twiddle.net>
To: John Rigby <john.rigby@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-devel <qemu-devel@nongnu.org>,
Alexander Graf <agraf@suse.de>
Subject: Re: [Qemu-devel] [PATCH v2 02/12] ARM: Prepare translation for AArch64 code
Date: Wed, 01 May 2013 10:32:19 +0100 [thread overview]
Message-ID: <5180E123.9080306@twiddle.net> (raw)
In-Reply-To: <1367303797-9561-1-git-send-email-john.rigby@linaro.org>
On 2013-04-30 07:36, John Rigby wrote:
> uint32_t regs[16];
> +
> + /* Regs for A64 mode. */
> + uint64_t xregs[31];
> + uint64_t pc;
> + uint64_t sp;
> + uint32_t pstate;
> + uint32_t aarch64_state; /* 1 if CPU is in aarch64 state */
> +
How do these registers overlap (or not) in real hardware?
Is it possible to union these with the 32-bit state?
r~
next prev parent reply other threads:[~2013-05-01 9:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-30 6:36 [Qemu-devel] [PATCH v2 02/12] ARM: Prepare translation for AArch64 code John Rigby
2013-04-30 9:36 ` Alexander Graf
2013-04-30 12:36 ` Peter Maydell
2013-05-02 21:25 ` John Rigby
2013-05-01 9:32 ` Richard Henderson [this message]
2013-05-01 10:19 ` Laurent Desnogues
2013-05-01 10:33 ` Peter Maydell
2013-05-02 21:22 ` John Rigby
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