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Date: Sun, 26 May 2013 17:55:33 +0200
From: =?ISO-8859-15?Q?Andreas_F=E4rber?= <afaerber@suse.de>
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Subject: Re: [Qemu-devel] [update][PATCH 00/12] target-i386: remove some
	macros
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To: liguang <lig.fnst@cn.fujitsu.com>
Cc: peter.maydell@linaro.org, ehabkost@redhat.com, qemu-devel@nongnu.org, blauwirbel@gmail.com, pbonzini@redhat.com, imammedo@redhat.com, rth@twiddle.net

Am 24.05.2013 13:37, schrieb Andreas F=E4rber:
> Am 23.04.2013 10:16, schrieb liguang:
>> remove macros EAX, EBX, ECX, EDX, EBP, ESP, ESI, EDI, EIP, DF
>> as suggested by Richard Henderson <rth@twiddle.net>
>>
>> Li Guang (12)
>> 	 target-i386/helper: remove EAX macro
>> 	 target-i386/helper: remove EBX macro
>> 	 target-i386/helper: remove ECX macro
>> 	 target-i386/helper: remove EDX macro
>> 	 target-i386/helper: remove EBP macro
>> 	 target-i386/helper: remove ESP macro
>> 	 target-i386/helper: remove ESI macro
>> 	 target-i386/helper: remove EDI macro
>> 	 target-i386/helper: remove EIP macro
>> 	 target-i386/helper: remove DF macro
>> 	 target-i386/helper: remove redundant env->eip assignment
>> 	 target-i386: fix over 80 chars warnings
>=20
> Hard Freeze is over, so more time to look into refactorings:
>=20
> There's one thing to be aware of here, macros would make it easier to
> transition from CPUX86State to X86CPU fields. However I am guessing tha=
t
> all these registers are accessed by TCG code via offsets from cpu_env -
> please verify that.

Confirmed, I just stumbled over it myself in translate.c:
* all but EIP and DF are assigned to cpu_regs[]
* EIP is manually stored with offsetof() twice
* DF is manually loaded/stored with offsetof() thrice

Andreas

> If so,
>=20
> Reviewed-by: Andreas F=E4rber <afaerber@suse.de>
>=20
> However, it would be nice if you could fix the \ alignment in patch
> 06/12 or in the cleanup patch 12/12.
>=20
> Regards,
> Andreas

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