From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:34696) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ui1mL-0007SH-6P for qemu-devel@nongnu.org; Thu, 30 May 2013 08:16:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ui1mD-0007X4-3c for qemu-devel@nongnu.org; Thu, 30 May 2013 08:16:25 -0400 Received: from mx1.redhat.com ([209.132.183.28]:12491) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ui1mC-0007Ws-Rv for qemu-devel@nongnu.org; Thu, 30 May 2013 08:16:17 -0400 Message-ID: <51A7430D.7060102@redhat.com> Date: Thu, 30 May 2013 14:16:13 +0200 From: Gerd Hoffmann MIME-Version: 1.0 References: <1369911913-10934-1-git-send-email-mst@redhat.com> <1369911913-10934-3-git-send-email-mst@redhat.com> In-Reply-To: <1369911913-10934-3-git-send-email-mst@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 2/5] pci: store PCI hole ranges in guestinfo structure List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Anthony Liguori , qemu-devel@nongnu.org Hi, > + } else { > + guest_info->pci_info.w64.begin = 0x100000000ULL + above_4g_mem_size; > + guest_info->pci_info.w64.end = guest_info->pci_info.w64.begin + > + (0x1ULL << 62); Doesn't this give unaligned windows? > + /* Set PCI window size the way seabios has always done it. */ > + /* TODO: consider just starting at below_4g_mem_size */ Used to be that way. Was changed for alignment reasons (i.e. 1G window starts at 1G border etc). cheers, Gerd