From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44106) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ui3Yy-0001Xf-3a for qemu-devel@nongnu.org; Thu, 30 May 2013 10:10:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ui3Ym-0001tu-DB for qemu-devel@nongnu.org; Thu, 30 May 2013 10:10:43 -0400 Message-ID: <51A75DD4.8070908@suse.de> Date: Thu, 30 May 2013 16:10:28 +0200 From: =?ISO-8859-1?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <20130528141922.135a6dd0@redhat.com> <20130530085932.5db02527@redhat.com> <51A75122.9020305@redhat.com> <20130530091645.08e47dbb@redhat.com> In-Reply-To: <20130530091645.08e47dbb@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] walk_pml4e(): fix abort on bad PML4E/PDPTE/PDE/PTE addresses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Luiz Capitulino Cc: qiaonuohan@cn.fujitsu.com, Laszlo Ersek , qemu-stable@nongnu.org, qemu-devel Am 30.05.2013 15:16, schrieb Luiz Capitulino: > On Thu, 30 May 2013 15:16:18 +0200 > Laszlo Ersek wrote: >=20 >> On 05/30/13 14:59, Luiz Capitulino wrote: >>> On Tue, 28 May 2013 14:19:22 -0400 >>> Luiz Capitulino wrote: >>> >>>> The code used to walk IA-32e page-tables, and possibly PAE page-tabl= es, >>>> uses the bit mask ~0xfff to get the next PML4E/PDPTE/PDE/PTE address= . >>>> >>>> However, as we use a uint64_t to store the resulting address, that m= ask >>>> gets expanded to 0xfffffffffffff000 which not only ends up selecting >>>> reserved bits but also selects the XD bit (execute-disable) which >>>> happens to be enabled by Windows 8, causing qemu_get_ram_ptr() to ab= ort. >>>> >>>> This commit fixes that problem by replacing ~0xfff by a correct mask >>>> that only selects the address bit range (ie. bits 51:12). >>>> >>>> Signed-off-by: Luiz Capitulino >>> >>> Ping? Wen? >>> >>> Would be nice get a Reviewed-by before merging... >> >> I didn't miss your submission and did find it OK, I just felt unsure >> about stating so, because "simple" patches like this are prime territo= ry >> to burn someone's R-b's worth (ie. to expose a reviewer's lack of >> information / experience). But hey, what can I lose? The patch does lo= ok >> good to me, so >=20 > Thank you Laszlo! It's also new territory for me, that's why I'm asking > for reviews (otherwise I'd just sneak it in some pull request :-) Luiz, you aware aware that I have another fix by Nuohan queued that seemed orthogonal? If someone reviews my refactoring series (which resent that patch) I would like to send out a PULL for that rather soon, since it blocks further CPU work. I would then include your fix as well to avoid merge conflicts. Andreas >=20 >> >> Reviewed-by: Laszlo Ersek >> >>> >>>> --- >>>> >>>> PS: I (obviously) don't any more core dumps with this patch applied,= but >>>> I couldn't check if the Windows dump is correct (does anyone kno= w >>>> how to do this?). I did quickly check on Linux though. >>>> >>>> target-i386/arch_memory_mapping.c | 10 ++++++---- >>>> 1 file changed, 6 insertions(+), 4 deletions(-) >>>> >>>> diff --git a/target-i386/arch_memory_mapping.c b/target-i386/arch_me= mory_mapping.c >>>> index 844893f..24884bd 100644 >>>> --- a/target-i386/arch_memory_mapping.c >>>> +++ b/target-i386/arch_memory_mapping.c >>>> @@ -75,6 +75,8 @@ static void walk_pte2(MemoryMappingList *list, >>>> } >>>> =20 >>>> /* PAE Paging or IA-32e Paging */ >>>> +#define PLM4_ADDR_MASK 0xffffffffff000 /* selects bits 51:12 */ >>>> + >>>> static void walk_pde(MemoryMappingList *list, hwaddr pde_start_addr= , >>>> int32_t a20_mask, target_ulong start_line_addr= ) >>>> { >>>> @@ -105,7 +107,7 @@ static void walk_pde(MemoryMappingList *list, hw= addr pde_start_addr, >>>> continue; >>>> } >>>> =20 >>>> - pte_start_addr =3D (pde & ~0xfff) & a20_mask; >>>> + pte_start_addr =3D (pde & PLM4_ADDR_MASK) & a20_mask; >>>> walk_pte(list, pte_start_addr, a20_mask, line_addr); >>>> } >>>> } >>>> @@ -208,7 +210,7 @@ static void walk_pdpe(MemoryMappingList *list, >>>> continue; >>>> } >>>> =20 >>>> - pde_start_addr =3D (pdpe & ~0xfff) & a20_mask; >>>> + pde_start_addr =3D (pdpe & PLM4_ADDR_MASK) & a20_mask; >>>> walk_pde(list, pde_start_addr, a20_mask, line_addr); >>>> } >>>> } >>>> @@ -231,7 +233,7 @@ static void walk_pml4e(MemoryMappingList *list, >>>> } >>>> =20 >>>> line_addr =3D ((i & 0x1ffULL) << 39) | (0xffffULL << 48); >>>> - pdpe_start_addr =3D (pml4e & ~0xfff) & a20_mask; >>>> + pdpe_start_addr =3D (pml4e & PLM4_ADDR_MASK) & a20_mask; >>>> walk_pdpe(list, pdpe_start_addr, a20_mask, line_addr); >>>> } >>>> } >>>> @@ -249,7 +251,7 @@ int cpu_get_memory_mapping(MemoryMappingList *li= st, CPUArchState *env) >>>> if (env->hflags & HF_LMA_MASK) { >>>> hwaddr pml4e_addr; >>>> =20 >>>> - pml4e_addr =3D (env->cr[3] & ~0xfff) & env->a20_mask; >>>> + pml4e_addr =3D (env->cr[3] & PLM4_ADDR_MASK) & env->a20= _mask; >>>> walk_pml4e(list, pml4e_addr, env->a20_mask); >>>> } else >>>> #endif >>> >>> >> >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg