From: Fabien Chouteau <chouteau@adacore.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: blauwirbel@gmail.com, pbonzini@redhat.com, rth@twiddle.net,
qemu-devel@nongnu.org, afaerber@suse.de
Subject: Re: [Qemu-devel] [PATCH] ARM: Fix disable interrupt for M profile
Date: Fri, 31 May 2013 11:04:37 +0200 [thread overview]
Message-ID: <51A867A5.4050101@adacore.com> (raw)
In-Reply-To: <CAFEAcA-57Lq5XyYFSpAsrAraxkGWD+Oojzrz92UzZAzo=rx_3w@mail.gmail.com>
On 05/30/2013 07:26 PM, Peter Maydell wrote:
> On 30 May 2013 17:22, Fabien Chouteau <chouteau@adacore.com> wrote:
>> I'm not sure this was expected or not, but it looks like the "||" should
>> be a "&&". Otherwise it's not possible to disable interrupt.
>>
>> Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
>
> We've had people trying to fiddle with this bit of code
> before. I'd like to see a clear description of:
> * the bug (ideally with a test case)
The bug: It's impossible to disable interrupt on M-profile.
Test case: I can try to build a binary, the source will be in Ada.
> * why this patch fixes it (probably with reference to the
> architecture manual and to what QEMU means when it sets
> "CPSR_I" on M profile [hint: look at how we handle PRIMASK])
I do not intend to do a full review of interrupt handling in the
M-profile. I just noticed that disabling interrupt was not effective,
and found this condition that looked faulty to me. I want to fix the
condition to match requirements of the comment above.
> * a demonstration that it doesn't break non-M-profile
>
Much more difficult for me, but that's what peer-review is for, right?.
>> @@ -462,8 +462,8 @@ int cpu_exec(CPUArchState *env)
>> We avoid this by disabling interrupts when
>> pc contains a magic address. */
>> if (interrupt_request & CPU_INTERRUPT_HARD
>> - && ((IS_M(env) & env->regs[15] < 0xfffffff0)
>> - || !(env->uncached_cpsr & CPSR_I))) {
>> + && (IS_M(env) && env->regs[15] < 0xfffffff0)
>> + && !(env->uncached_cpsr & CPSR_I)) {
>> env->exception_index = EXCP_IRQ;
>> cc->do_interrupt(cpu);
>> next_tb = 0;
>
> ...for instance this change means that the if() condition
> will now never be satisfied for a non-M-profile core,
> which is definitely wrong.
>
You're right I did this a little bit too quickly.
The expression should be:
if (interrupt_request & CPU_INTERRUPT_HARD
&& (!IS_M(env) || env->regs[15] < 0xfffffff0)
&& !(env->uncached_cpsr & CPSR_I)) {
I'll resend a patch, just in case.
Thanks,
--
Fabien Chouteau
next prev parent reply other threads:[~2013-05-31 9:04 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-30 16:22 [Qemu-devel] [PATCH] ARM: Fix disable interrupt for M profile Fabien Chouteau
2013-05-30 17:26 ` Peter Maydell
2013-05-31 9:04 ` Fabien Chouteau [this message]
2013-05-31 9:39 ` Peter Maydell
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