From: Richard Henderson <rth@twiddle.net>
To: Anton Blanchard <anton@samba.org>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, agraf@suse.de,
aurelien@aurel32.net, david@gibson.dropbear.id.au
Subject: Re: [Qemu-devel] [PATCH 1/4] tcg-ppc64: Fix RLDCL opcode
Date: Mon, 03 Jun 2013 07:28:00 -0700 [thread overview]
Message-ID: <51ACA7F0.5000904@twiddle.net> (raw)
In-Reply-To: <20130602222723.1e006760@kryten>
On 06/02/2013 05:27 AM, Anton Blanchard wrote:
> The rldcl instruction doesn't have an sh field, so the minor opcode
> of 8 is actually 4 when using the XO30 macro.
>
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Anton Blanchard <anton@samba.org>
> ---
>
> Index: b/tcg/ppc64/tcg-target.c
> ===================================================================
> --- a/tcg/ppc64/tcg-target.c
> +++ b/tcg/ppc64/tcg-target.c
> @@ -357,7 +357,7 @@ static int tcg_target_const_match (tcg_t
> #define RLDICL XO30( 0)
> #define RLDICR XO30( 1)
> #define RLDIMI XO30( 3)
> -#define RLDCL XO30( 8)
> +#define RLDCL XO30( 4)
Oops.
But that suggests then that we ought not be using XO30.
Or at least adding a comment.
r~
next prev parent reply other threads:[~2013-06-03 14:28 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-02 12:24 [Qemu-devel] [PATCH 0/4] Fix ppc64 tcg issues Anton Blanchard
2013-06-02 12:27 ` [Qemu-devel] [PATCH 1/4] tcg-ppc64: Fix RLDCL opcode Anton Blanchard
2013-06-03 14:28 ` Richard Henderson [this message]
2013-06-11 11:19 ` Anton Blanchard
2013-06-11 13:49 ` Richard Henderson
2013-06-02 12:28 ` [Qemu-devel] [PATCH 2/4] tcg-ppc64: bswap64 rotates output 32 bits Anton Blanchard
2013-06-03 14:31 ` Richard Henderson
2013-06-02 12:29 ` [Qemu-devel] [PATCH 3/4] tcg-ppc64: Fix add2_i64 Anton Blanchard
2013-06-03 14:32 ` Richard Henderson
2013-06-02 12:30 ` [Qemu-devel] [PATCH 4/4] tcg-ppc64: rotr_i32 rotates wrong amount Anton Blanchard
2013-06-03 14:33 ` Richard Henderson
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