From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35719) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UmJh1-0003Yx-9I for qemu-devel@nongnu.org; Tue, 11 Jun 2013 04:12:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UmJgw-0006ll-Kj for qemu-devel@nongnu.org; Tue, 11 Jun 2013 04:12:39 -0400 Received: from lhrrgout.huawei.com ([194.213.3.17]:17356) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UmJgw-0006lL-Cd for qemu-devel@nongnu.org; Tue, 11 Jun 2013 04:12:34 -0400 Message-ID: <51B6DBB7.2000800@huawei.com> Date: Tue, 11 Jun 2013 10:11:35 +0200 From: Claudio Fontana MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 0/1] TCG Aarch64 ldst 12bit scaled uimm List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Laurent Desnogues , Jani Kokkonen , "qemu-devel@nongnu.org" , Richard Henderson Using only the ldst simm9 (unscaled offset) will often result in the fallback mov immediate + ldst (register offset) to be triggered. This change implements the ldst uimm12 (scaled offset), which avoids the expensive fallback in certain conditions: the offset must be naturally aligned and positive, and the scaled value must be representable with 12bits. This patch requires multiple reviewed but not committed yet series reachable from: https://lists.gnu.org/archive/html/qemu-devel/2013-06/msg00880.html "AArch64 TCG target implementation, git repo" Claudio Fontana (1): tcg/aarch64: implement ldst 12bit scaled uimm offset tcg/aarch64/tcg-target.c | 32 +++++++++++++++++++++++++++++--- 1 file changed, 29 insertions(+), 3 deletions(-) -- 1.8.1