From: Richard Henderson <rth@twiddle.net>
To: Anton Blanchard <anton@samba.org>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, agraf@suse.de,
aurelien@aurel32.net, david@gibson.dropbear.id.au
Subject: Re: [Qemu-devel] [PATCH 1/4] tcg-ppc64: Fix RLDCL opcode
Date: Tue, 11 Jun 2013 06:49:56 -0700 [thread overview]
Message-ID: <51B72B04.30207@twiddle.net> (raw)
In-Reply-To: <20130611211935.7e171873@kryten>
On 06/11/2013 04:19 AM, Anton Blanchard wrote:
> The rldcl instruction doesn't have an sh field, so the minor opcode
> is shifted 1 bit. We were using the XO30 macro which shifted the
> minor opcode 2 bits.
>
> Remove XO30 and add MD30 and MDS30 macros which match the
> Power ISA categories.
>
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Anton Blanchard <anton@samba.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
next prev parent reply other threads:[~2013-06-11 13:50 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-02 12:24 [Qemu-devel] [PATCH 0/4] Fix ppc64 tcg issues Anton Blanchard
2013-06-02 12:27 ` [Qemu-devel] [PATCH 1/4] tcg-ppc64: Fix RLDCL opcode Anton Blanchard
2013-06-03 14:28 ` Richard Henderson
2013-06-11 11:19 ` Anton Blanchard
2013-06-11 13:49 ` Richard Henderson [this message]
2013-06-02 12:28 ` [Qemu-devel] [PATCH 2/4] tcg-ppc64: bswap64 rotates output 32 bits Anton Blanchard
2013-06-03 14:31 ` Richard Henderson
2013-06-02 12:29 ` [Qemu-devel] [PATCH 3/4] tcg-ppc64: Fix add2_i64 Anton Blanchard
2013-06-03 14:32 ` Richard Henderson
2013-06-02 12:30 ` [Qemu-devel] [PATCH 4/4] tcg-ppc64: rotr_i32 rotates wrong amount Anton Blanchard
2013-06-03 14:33 ` Richard Henderson
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