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Sender: Richard Henderson <rth7680@gmail.com>
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Date: Tue, 11 Jun 2013 06:49:56 -0700
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH 1/4] tcg-ppc64: Fix RLDCL opcode
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To: Anton Blanchard <anton@samba.org>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, agraf@suse.de, aurelien@aurel32.net, david@gibson.dropbear.id.au

On 06/11/2013 04:19 AM, Anton Blanchard wrote:
> The rldcl instruction doesn't have an sh field, so the minor opcode
> is shifted 1 bit. We were using the XO30 macro which shifted the
> minor opcode 2 bits.
> 
> Remove XO30 and add MD30 and MDS30 macros which match the
> Power ISA categories.
> 
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Anton Blanchard <anton@samba.org>

Reviewed-by: Richard Henderson <rth@twiddle.net>

r~