From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51929) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Un5T3-000726-PL for qemu-devel@nongnu.org; Thu, 13 Jun 2013 07:13:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Un5T2-0006DS-Ap for qemu-devel@nongnu.org; Thu, 13 Jun 2013 07:13:25 -0400 Message-ID: <51B9A952.4040809@suse.de> Date: Thu, 13 Jun 2013 13:13:22 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1371120709-18923-1-git-send-email-hutao@cn.fujitsu.com> <51B9A88C.3080105@suse.de> In-Reply-To: <51B9A88C.3080105@suse.de> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] fix some printf errors when debug is enabled List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Hu Tao Cc: qemu-trivial@nongnu.org, qemu-devel@nongnu.org Am 13.06.2013 13:10, schrieb Andreas F=E4rber: > Am 13.06.2013 12:51, schrieb Hu Tao: >> Signed-off-by: Hu Tao >> --- >> cputlb.c | 4 ++-- >> hw/acpi/piix4.c | 6 +++--- >> 2 files changed, 5 insertions(+), 5 deletions(-) >> >> diff --git a/cputlb.c b/cputlb.c >> index 86666c8..1230e9e 100644 >> --- a/cputlb.c >> +++ b/cputlb.c >> @@ -262,8 +262,8 @@ void tlb_set_page(CPUArchState *env, target_ulong = vaddr, >> =20 >> #if defined(DEBUG_TLB) >> printf("tlb_set_page: vaddr=3D" TARGET_FMT_lx " paddr=3D0x" TARGE= T_FMT_plx >> - " prot=3D%x idx=3D%d pd=3D0x%08lx\n", >> - vaddr, paddr, prot, mmu_idx, pd); >> + " prot=3D%x idx=3D%d\n", >> + vaddr, paddr, prot, mmu_idx); >> #endif >> =20 >> address =3D vaddr; >> diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c >> index e6525ac..eafa76f 100644 >> --- a/hw/acpi/piix4.c >> +++ b/hw/acpi/piix4.c >> @@ -518,7 +518,7 @@ static uint64_t gpe_readb(void *opaque, hwaddr add= r, unsigned width) >> PIIX4PMState *s =3D opaque; >> uint32_t val =3D acpi_gpe_ioport_readb(&s->ar, addr); >> =20 >> - PIIX4_DPRINTF("gpe read %x =3D=3D %x\n", addr, val); >> + PIIX4_DPRINTF("gpe read %lx =3D=3D %x\n", addr, val); >=20 > You need HWADDR_PRIx as seen below, because it might be %llx on some > platforms. While touching it, changing %x to PRIx32 would be even bette= r. >=20 >> return val; >> } >> =20 >> @@ -530,7 +530,7 @@ static void gpe_writeb(void *opaque, hwaddr addr, = uint64_t val, >> acpi_gpe_ioport_writeb(&s->ar, addr, val); >> pm_update_sci(s); >> =20 >> - PIIX4_DPRINTF("gpe write %x <=3D=3D %d\n", addr, val); >> + PIIX4_DPRINTF("gpe write %lx <=3D=3D %lu\n", addr, val); >=20 > HWADDR_PRIx, PRIx64 err... PRIu64 obviously. >=20 > Regards, > Andreas >=20 >> } >> =20 >> static const MemoryRegionOps piix4_gpe_ops =3D { >> @@ -579,7 +579,7 @@ static void pci_write(void *opaque, hwaddr addr, u= int64_t data, >> switch (addr) { >> case PCI_EJ_BASE - PCI_HOTPLUG_ADDR: >> acpi_piix_eject_slot(opaque, (uint32_t)data); >> - PIIX4_DPRINTF("pciej write %" HWADDR_PRIx " <=3D=3D % " PRIu6= 4 "\n", >> + PIIX4_DPRINTF("pciej write %" HWADDR_PRIx " <=3D=3D %" PRIu64= "\n", >> addr, data); >> break; >> default: >> >=20 >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg