From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43028) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UogfP-000560-0y for qemu-devel@nongnu.org; Mon, 17 Jun 2013 17:08:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UogfM-0005W9-FC for qemu-devel@nongnu.org; Mon, 17 Jun 2013 17:08:46 -0400 Received: from mail-yh0-x22a.google.com ([2607:f8b0:4002:c01::22a]:47014) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UogfM-0005W4-BA for qemu-devel@nongnu.org; Mon, 17 Jun 2013 17:08:44 -0400 Received: by mail-yh0-f42.google.com with SMTP id c41so1227333yho.15 for ; Mon, 17 Jun 2013 14:08:44 -0700 (PDT) Sender: Richard Henderson Message-ID: <51BF7AD8.2000301@twiddle.net> Date: Mon, 17 Jun 2013 14:08:40 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1371398269-6213-1-git-send-email-afaerber@suse.de> <1371398269-6213-27-git-send-email-afaerber@suse.de> In-Reply-To: <1371398269-6213-27-git-send-email-afaerber@suse.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH qom-cpu v2 26/29] intc/sh_intc: Build sh_intc only once List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Cc: qemu-devel@nongnu.org On 06/16/2013 08:57 AM, Andreas Färber wrote: > Since converting first_cpu to CPUState and making CPU_INTERRUPT_HARD > available through qom/cpu.h, it no longer depends on CPUSH4State. Re 25/, how is CPU_INTERRUPT_HARD any less target dependent than CPU_INTERRUPT_TGT_EXT_0? Both require knowledge of how the system delivers interrupts. r~