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From: Paolo Bonzini <pbonzini@redhat.com>
To: Richard Henderson <rth@twiddle.net>
Cc: Torvald Riegel <triegel@redhat.com>,
	Andrew Haley <aph@redhat.com>, Liu Ping Fan <qemulist@gmail.com>,
	qemu-devel@nongnu.org, Anthony Liguori <anthony@codemonkey.ws>,
	"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Subject: [Qemu-devel] Java volatile vs. C11 seq_cst (was Re: [PATCH v2 1/2] add a header file for atomic operations)
Date: Tue, 18 Jun 2013 15:24:24 +0200	[thread overview]
Message-ID: <51C05F88.2090308@redhat.com> (raw)
In-Reply-To: <51BF5C0F.6020209@twiddle.net>

Il 17/06/2013 20:57, Richard Henderson ha scritto:
>> + * And for the few ia64 lovers that exist, an atomic_mb_read is a ld.acq,
>> + * while an atomic_mb_set is a st.rel followed by a memory barrier.
> ...
>> + */
>> +#ifndef atomic_mb_read
>> +#if QEMU_GNUC_PREREQ(4, 8)
>> +#define atomic_mb_read(ptr)       ({             \
>> +    typeof(*ptr) _val;                           \
>> +    __atomic_load(ptr, &_val, __ATOMIC_SEQ_CST); \
>> +    _val;                                        \
>> +})
>> +#else
>> +#define atomic_mb_read(ptr)    ({           \
>> +    typeof(*ptr) _val = atomic_read(ptr);   \
>> +    smp_rmb();                              \
>> +    _val;                                   \
> 
> This latter definition is ACQUIRE not SEQ_CST (except for ia64).  Without
> load_acquire, one needs barriers before and after the atomic_read in order to
> implement SEQ_CST.

The store-load barrier between atomic_mb_set and atomic_mb_read are
provided by the atomic_mb_set.  The load-load barrier between two
atomic_mb_reads are provided by the first read.

> So again I have to ask, what semantics are you actually looking for here?

So, everything I found points to Java volatile being sequentially
consistent, though I'm still not sure why C11 suggests hwsync for load
seq-cst on POWER instead of lwsync.  Comparing the sequences that my
code (based on the JSR-133 cookbook) generate with the C11 suggestions
you get:

    Load seqcst               hwsync; ld; cmp; bc; isync
    Store seqcst              hwsync; st
    (source: http://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html)

    Load Java volatile        ld; lwsync
    Store Java volatile       lwsync; st; hwsync
    (source: http://g.oswego.edu/dl/jmm/cookbook.html)

where the lwsync in loads acts as a load-load barrier, while the one in
stores acts as load-store + store-store barrier.

Is the cookbook known to be wrong?

Or is Java volatile somewhere between acq_rel and seq_cst, as the last
paragraph of
http://www.cs.umd.edu/~pugh/java/memoryModel/jsr-133-faq.html#volatile
seems to suggest?

Paolo

  parent reply	other threads:[~2013-06-18 13:24 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-16 11:21 [Qemu-devel] [PATCH v2 0/2] make AioContext's bh re-entrant Liu Ping Fan
2013-06-16 11:21 ` [Qemu-devel] [PATCH v2 1/2] add a header file for atomic operations Liu Ping Fan
2013-06-17 18:57   ` Richard Henderson
2013-06-18  8:36     ` Paolo Bonzini
2013-06-18 11:03       ` Paolo Bonzini
2013-06-18 14:38       ` Richard Henderson
2013-06-18 15:04         ` Paolo Bonzini
2013-06-18 13:24     ` Paolo Bonzini [this message]
2013-06-18 14:50       ` [Qemu-devel] Java volatile vs. C11 seq_cst (was Re: [PATCH v2 1/2] add a header file for atomic operations) Paul E. McKenney
2013-06-18 15:29         ` Peter Sewell
2013-06-18 15:37         ` Torvald Riegel
2013-06-19  1:53           ` Paul E. McKenney
2013-06-19  7:11             ` Torvald Riegel
2013-06-20 15:18               ` Paul E. McKenney
2013-06-18 16:08         ` Paolo Bonzini
2013-06-18 16:38           ` Torvald Riegel
2013-06-19  1:57             ` Paul E. McKenney
2013-06-19  9:31             ` Paolo Bonzini
2013-06-19 13:15               ` Torvald Riegel
2013-06-19 15:14                 ` Paolo Bonzini
2013-06-19 20:25                   ` Torvald Riegel
2013-06-20  7:53                     ` Paolo Bonzini
2013-06-22 10:55                       ` Torvald Riegel
2013-06-18 15:26       ` Torvald Riegel
2013-06-18 17:38       ` Andrew Haley
2013-06-19  9:30         ` Paolo Bonzini
2013-06-19 15:36           ` Andrew Haley
2013-06-16 11:21 ` [Qemu-devel] [PATCH v2 2/2] QEMUBH: make AioContext's bh re-entrant Liu Ping Fan
2013-06-17 15:28   ` Stefan Hajnoczi
2013-06-17 16:41     ` Paolo Bonzini
2013-06-18  2:19     ` liu ping fan
2013-06-18  9:31       ` Stefan Hajnoczi
2013-06-18 15:14   ` mdroth
2013-06-18 16:19     ` mdroth
2013-06-18 19:20     ` Paolo Bonzini
2013-06-18 22:26       ` mdroth
2013-06-19  9:27         ` Paolo Bonzini
2013-06-20  9:11           ` Stefan Hajnoczi
2013-06-17  7:11 ` [Qemu-devel] [PATCH v2 0/2] " Paolo Bonzini
2013-06-18  2:40   ` liu ping fan
2013-06-18  8:36     ` Paolo Bonzini

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