From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44515) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UrqPW-0002iq-JR for qemu-devel@nongnu.org; Wed, 26 Jun 2013 10:09:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UrqPQ-00051b-Uc for qemu-devel@nongnu.org; Wed, 26 Jun 2013 10:09:26 -0400 Received: from lhrrgout.huawei.com ([194.213.3.17]:39601) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UrqPQ-00050q-Lt for qemu-devel@nongnu.org; Wed, 26 Jun 2013 10:09:20 -0400 Message-ID: <51CAF606.80901@huawei.com> Date: Wed, 26 Jun 2013 16:09:10 +0200 From: Claudio Fontana MIME-Version: 1.0 References: 1370541947-909-6-git-send-email-rth@twiddle.net Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 5/5] tcg-arm: Use AT_PLATFORM to detect the host ISA List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: "qemu-devel@nongnu.org" Richard wrote (eons ago): > With this we can generate armv7 insns even when the OS compiles for a > lower common denominator. The macros are arranged so that when we do > compile for a given ISA, all of the runtime checks for that ISA are > optimized away. > > Signed-off-by: Richard Henderson > --- > tcg/arm/tcg-target.c | 22 +++++++++++++++++----- > 1 file changed, 17 insertions(+), 5 deletions(-) > > diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c > index 202f1fc..243dedd 100644 > --- a/tcg/arm/tcg-target.c > +++ b/tcg/arm/tcg-target.c > @@ -41,9 +41,11 @@ > # endif > #endif > > -#define use_armv5_instructions (__ARM_ARCH >= 5) > -#define use_armv6_instructions (__ARM_ARCH >= 6) > -#define use_armv7_instructions (__ARM_ARCH >= 7) > +static int arm_arch = __ARM_ARCH; > + > +#define use_armv5_instructions (__ARM_ARCH >= 5 || arm_arch >= 5) > +#define use_armv6_instructions (__ARM_ARCH >= 6 || arm_arch >= 6) > +#define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7) > > #ifndef use_idiv_instructions > bool use_idiv_instructions; > @@ -2036,12 +2038,22 @@ static const TCGTargetOpDef arm_op_defs[] = { > > static void tcg_target_init(TCGContext *s) > { > -#if defined(CONFIG_GETAUXVAL) && !defined(use_idiv_instructions) > +#if defined(CONFIG_GETAUXVAL) > + /* Only probe for the platform and capabilities if we havn't already > + determined maximum values at compile time. */ > +# if !defined(use_idiv_instructions) > { > unsigned long hwcap = getauxval(AT_HWCAP); > use_idiv_instructions = hwcap & (HWCAP_ARM_IDIVA | HWCAP_ARM_IDIVT); > } > -#endif > +# endif > + if (__ARM_ARCH < 7) { > + const char *pl = (const char *)getauxval(AT_PLATFORM); > + if (pl != NULL && pl[0] == 'v' && pl[1] >= '4' && pl[1] <= '9') { > + arm_arch = pl[1] - '0'; > + } > + } > +#endif /* GETAUXVAL */ > > #if !defined(CONFIG_USER_ONLY) > /* fail safe */ > -- > 1.8.1.4 > this also fails to apply at the moment because of the removal of the 'fail safe' thing. Claudio