From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40764) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UunPq-0000vJ-TJ for qemu-devel@nongnu.org; Thu, 04 Jul 2013 13:34:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UunPm-0000B5-8M for qemu-devel@nongnu.org; Thu, 04 Jul 2013 13:33:58 -0400 Received: from mail-pb0-x232.google.com ([2607:f8b0:400e:c01::232]:62865) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UunPm-0000Ay-0b for qemu-devel@nongnu.org; Thu, 04 Jul 2013 13:33:54 -0400 Received: by mail-pb0-f50.google.com with SMTP id wz7so1385995pbc.23 for ; Thu, 04 Jul 2013 10:33:53 -0700 (PDT) Sender: Richard Henderson Message-ID: <51D5B1FD.7060407@twiddle.net> Date: Thu, 04 Jul 2013 10:33:49 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1372886968-17497-1-git-send-email-rth@twiddle.net> <1372886968-17497-9-git-send-email-rth@twiddle.net> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 08/14] tcg-arm: Make use of conditional availability of opcodes for divide List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: aliguori@us.ibm.com, claudio.fontana@huawei.com, qemu-devel@nongnu.org, afaerber@suse.de On 07/04/2013 04:02 AM, Peter Maydell wrote: > > My ARM system doesn't have a sys/auxv.h, which renders most of this patch > a bit moot (and certainly untestable :-)). Do newer glibc have this? glibc 2.16 has this. I've also got another pending patch set that implements getauxval inside qemu if it's not present in the system library. Which means that we can eliminate some of the ifdefery seen here. >> + unsigned long hwcap = getauxval(AT_HWCAP); >> + use_idiv_instructions = hwcap & (HWCAP_ARM_IDIVA | HWCAP_ARM_IDIVT); > > Doesn't this mean we'll try to use the ARM division > insns even if the CPU only supports the Thumb encodings? > I think you should only be testing for whether HWCAP_ARM_IDIVA > is set. I suppose. Though later kernels have actually merged these bits: uapi/asm/hwcap.h:27:#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) r~