From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46817) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uwf7s-0001qE-Qh for qemu-devel@nongnu.org; Tue, 09 Jul 2013 17:07:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Uwf7q-00030s-Sf for qemu-devel@nongnu.org; Tue, 09 Jul 2013 17:07:08 -0400 Received: from cantor2.suse.de ([195.135.220.15]:58985 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uwf4Z-00022Z-F8 for qemu-devel@nongnu.org; Tue, 09 Jul 2013 17:03:43 -0400 Message-ID: <51DC7AA7.8010406@suse.de> Date: Tue, 09 Jul 2013 23:03:35 +0200 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1373221591-17091-1-git-send-email-afaerber@suse.de> In-Reply-To: <1373221591-17091-1-git-send-email-afaerber@suse.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH qom-cpu v2 00/42] QOM CPUState, part 11: GDB stub List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Anthony Green , Blue Swirl , Max Filippov , Michael Walle , Jan Kiszka , Anthony Liguori , Paolo Bonzini , Guan Xuetao , =?UTF-8?B?QXVyw6lsaWVuIEphcm5v?= , Richard Henderson Am 07.07.2013 20:25, schrieb Andreas F=C3=A4rber: > Hello, >=20 > This series cleans up gdbstub by changing all its internal CPU state to= CPUState > and by moving most target-specific code into the target directories. >=20 > Support for m68k, moxie and unicore32 to set the PC via gdbstub is adde= d. >=20 > Lightweight subclasses for XtensaCPU are introduced, keeping the Xtensa= Config > mechanisms, to stop xtensa from deviating at gdbstub level wrt register= count. >=20 > I still wonder whether there would be interest in adding a "program-cou= nter" > dynamic property to the CPU, given that a setter has been factored out = here? >=20 > v2 replaces uint64_t with a new vaddr type, fixes xtensa breakage, adds= a patch > replacing GDB_CORE_XML and attempts to make the read/write_register cha= nges > better reviewable. More details below. Needs to be respun to keep find_cpu() around - any comments before I do? Andreas >=20 > Available for testing at: > git://github.com/afaerber/qemu-cpu.git qom-cpu-11.v2 > https://github.com/afaerber/qemu-cpu/commits/qom-cpu-11.v2 >=20 > Regards, > Andreas >=20 > v1 -> v2: > * Applied some patches. > * Introduced new vaddr type, name courtesy of PMM. > * Avoided making the TranslationBlock typedef generally available. > * Rebased to avoid env/cpu field in alpha DisasContext (rth). > * Added missing ppc_cpu_get_phys_page_debug assignment. > * Converted two more cpu_get_phys_page_debug()s breaking xtensa (Max). > * Simplified xtensa subclasses by keeping CPUXtensaState::config for no= w (Max). > * Split up cpu_gdb_{read,write}_register() conversion (rth). > * Appended patch to drop GDB_CORE_XML. >=20 > Cc: Anthony Liguori > Cc: Blue Swirl > Cc: Aur=C3=A9lien Jarno > Cc: Paolo Bonzini > Cc: Jan Kiszka (gdbstub) > Cc: Anthony Green (moxie) > Cc: Guan Xuetao (unicore32) > Cc: Max Filippov (xtensa) > Cc: Richard Henderson > Cc: Michael Walle (lm32) > Cc: Peter Maydell (vaddr) >=20 > Andreas F=C3=A4rber (42): > cpu: Introduce vaddr type > cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc() > target-m68k: Implement CPUClass::set_pc() > target-moxie: Implement CPUClass::set_pc() > target-unicore32: Implement CPUClass::set_pc() > cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb() > cpu: Move singlestep_enabled field from CPU_COMMON to CPUState > gdbstub: Update gdb_handlesig() and gdb_signalled() Coding Style > cpu: Change cpu_single_step() argument to CPUState > kvm: Change kvm_{insert,remove}_breakpoint() argument to CPUState > gdbstub: Change syscall callback argument to CPUState > gdbstub: Change gdb_handlesig() argument to CPUState > gdbstub: Change GDBState::c_cpu to CPUState > gdbstub: Change gdb_{read,write}_register() argument to CPUState > cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook > exec: Change cpu_memory_rw_debug() argument to CPUState > cpu: Introduce CPUClass::memory_rw_debug() for > target_memory_rw_debug() > gdbstub: Change GDBState::g_cpu to CPUState > cpu: Move gdb_regs field from CPU_COMMON to CPUState > gdbstub: Change gdb_register_coprocessor() argument to CPUState > target-xtensa: Introduce XtensaCPU subclasses > gdbstub: Fix cpu_gdb_{read,write}_register() Coding Style > gdbstub: Drop dead code in cpu_gdb_{read,write}_register() > cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs > target-i386: Move cpu_gdb_{read,write}_register() > target-ppc: Move cpu_gdb_{read,write}_register() > target-sparc: Move cpu_gdb_{read,write}_register() > target-arm: Move cpu_gdb_{read,write}_register() > target-m68k: Move cpu_gdb_{read,write}_register() > target-mips: Move cpu_gdb_{read,write}_register() > target-openrisc: Move cpu_gdb_{read,write}_register() > target-sh4: Move cpu_gdb_{read,write}_register() > target-microblaze: Move cpu_gdb_{read,write}_register() > target-cris: Move cpu_gdb_{read,write}_register() > target-alpha: Move cpu_gdb_{read,write}_register() > target-s390x: Move cpu_gdb_{read,write}_register() > target-lm32: Move cpu_gdb_{read,write}_register() > target-xtensa: Move cpu_gdb_{read,write}_register() > gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions > cpu: Introduce CPUClass::gdb_{read,write}_register() > target-cris: Factor out CPUClass::gdb_read_register() hook for v10 > cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML >=20 > bsd-user/main.c | 10 +- > cpu-exec.c | 10 +- > cpus.c | 6 +- > disas.c | 4 +- > exec.c | 36 +- > gdbstub.c | 1616 ++++---------------------------= -------- > hw/i386/kvmvapic.c | 78 +- > hw/xtensa/xtensa_lx60.c | 8 +- > hw/xtensa/xtensa_sim.c | 10 +- > include/exec/cpu-all.h | 14 +- > include/exec/cpu-defs.h | 3 - > include/exec/gdbstub.h | 51 +- > include/exec/softmmu-semi.h | 18 +- > include/qom/cpu.h | 122 +-- > include/sysemu/kvm.h | 4 +- > kvm-all.c | 12 +- > kvm-stub.c | 4 +- > linux-user/main.c | 35 +- > linux-user/signal.c | 3 +- > monitor.c | 2 +- > qom/cpu.c | 22 + > stubs/Makefile.objs | 1 + > stubs/gdbstub.c | 5 + > target-alpha/Makefile.objs | 1 + > target-alpha/cpu-qom.h | 3 + > target-alpha/cpu.c | 18 +- > target-alpha/cpu.h | 5 - > target-alpha/gdbstub.c | 93 +++ > target-alpha/helper.c | 5 +- > target-alpha/translate.c | 3 +- > target-arm/Makefile.objs | 1 + > target-arm/arm-semi.c | 10 +- > target-arm/cpu-qom.h | 5 + > target-arm/cpu.c | 17 +- > target-arm/cpu.h | 5 - > target-arm/gdbstub.c | 102 +++ > target-arm/helper.c | 15 +- > target-arm/translate.c | 7 +- > target-cris/Makefile.objs | 1 + > target-cris/cpu-qom.h | 6 + > target-cris/cpu.c | 19 + > target-cris/cpu.h | 4 - > target-cris/gdbstub.c | 130 ++++ > target-cris/helper.c | 7 +- > target-cris/translate.c | 7 +- > target-i386/Makefile.objs | 1 + > target-i386/cpu-qom.h | 5 + > target-i386/cpu.c | 22 +- > target-i386/cpu.h | 5 - > target-i386/gdbstub.c | 231 ++++++ > target-i386/helper.c | 12 +- > target-i386/kvm.c | 20 +- > target-i386/translate.c | 5 +- > target-lm32/Makefile.objs | 1 + > target-lm32/cpu-qom.h | 3 + > target-lm32/cpu.c | 16 +- > target-lm32/cpu.h | 5 - > target-lm32/gdbstub.c | 92 +++ > target-lm32/helper.c | 6 +- > target-lm32/translate.c | 7 +- > target-m68k/Makefile.objs | 1 + > target-m68k/cpu-qom.h | 3 + > target-m68k/cpu.c | 15 + > target-m68k/cpu.h | 5 - > target-m68k/gdbstub.c | 75 ++ > target-m68k/helper.c | 5 +- > target-m68k/m68k-semi.c | 5 +- > target-m68k/translate.c | 7 +- > target-microblaze/Makefile.objs | 1 + > target-microblaze/cpu-qom.h | 3 + > target-microblaze/cpu.c | 16 +- > target-microblaze/cpu.h | 5 - > target-microblaze/gdbstub.c | 56 ++ > target-microblaze/helper.c | 4 +- > target-microblaze/translate.c | 8 +- > target-mips/Makefile.objs | 1 + > target-mips/cpu-qom.h | 3 + > target-mips/cpu.c | 34 +- > target-mips/cpu.h | 7 - > target-mips/gdbstub.c | 155 ++++ > target-mips/helper.c | 7 +- > target-mips/translate.c | 11 +- > target-moxie/cpu.c | 13 +- > target-moxie/cpu.h | 6 +- > target-moxie/helper.c | 11 +- > target-moxie/translate.c | 5 +- > target-openrisc/Makefile.objs | 1 + > target-openrisc/cpu.c | 16 +- > target-openrisc/cpu.h | 8 +- > target-openrisc/gdbstub.c | 83 ++ > target-openrisc/mmu.c | 5 +- > target-openrisc/translate.c | 7 +- > target-ppc/Makefile.objs | 1 + > target-ppc/cpu-qom.h | 3 + > target-ppc/cpu.h | 5 - > target-ppc/gdbstub.c | 131 ++++ > target-ppc/mmu_helper.c | 4 +- > target-ppc/translate.c | 8 +- > target-ppc/translate_init.c | 35 +- > target-s390x/Makefile.objs | 1 + > target-s390x/cpu-qom.h | 3 + > target-s390x/cpu.c | 14 + > target-s390x/cpu.h | 5 - > target-s390x/gdbstub.c | 88 +++ > target-s390x/helper.c | 5 +- > target-s390x/translate.c | 5 +- > target-sh4/Makefile.objs | 1 + > target-sh4/cpu-qom.h | 3 + > target-sh4/cpu.c | 23 + > target-sh4/cpu.h | 6 - > target-sh4/gdbstub.c | 146 ++++ > target-sh4/helper.c | 5 +- > target-sh4/translate.c | 8 +- > target-sparc/Makefile.objs | 1 + > target-sparc/cpu-qom.h | 3 + > target-sparc/cpu.c | 34 +- > target-sparc/cpu.h | 11 +- > target-sparc/gdbstub.c | 208 +++++ > target-sparc/mmu_helper.c | 22 +- > target-sparc/translate.c | 3 +- > target-unicore32/cpu-qom.h | 1 + > target-unicore32/cpu.c | 11 + > target-unicore32/cpu.h | 5 - > target-unicore32/softmmu.c | 7 +- > target-unicore32/translate.c | 7 +- > target-xtensa/Makefile.objs | 1 + > target-xtensa/cpu-qom.h | 6 + > target-xtensa/cpu.c | 40 +- > target-xtensa/cpu.h | 5 - > target-xtensa/gdbstub.c | 109 +++ > target-xtensa/helper.c | 47 +- > target-xtensa/translate.c | 7 +- > target-xtensa/xtensa-semi.c | 14 +- > 133 files changed, 2701 insertions(+), 1892 deletions(-) > create mode 100644 stubs/gdbstub.c > create mode 100644 target-alpha/gdbstub.c > create mode 100644 target-arm/gdbstub.c > create mode 100644 target-cris/gdbstub.c > create mode 100644 target-i386/gdbstub.c > create mode 100644 target-lm32/gdbstub.c > create mode 100644 target-m68k/gdbstub.c > create mode 100644 target-microblaze/gdbstub.c > create mode 100644 target-mips/gdbstub.c > create mode 100644 target-openrisc/gdbstub.c > create mode 100644 target-ppc/gdbstub.c > create mode 100644 target-s390x/gdbstub.c > create mode 100644 target-sh4/gdbstub.c > create mode 100644 target-sparc/gdbstub.c > create mode 100644 target-xtensa/gdbstub.c >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg