From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39695) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UzS3J-0008Ux-49 for qemu-devel@nongnu.org; Wed, 17 Jul 2013 09:46:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UzS3E-0004Bv-7z for qemu-devel@nongnu.org; Wed, 17 Jul 2013 09:45:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55217) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UzS3D-0004Ar-JX for qemu-devel@nongnu.org; Wed, 17 Jul 2013 09:45:52 -0400 Message-ID: <51E6A003.8070106@redhat.com> Date: Wed, 17 Jul 2013 15:45:39 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1373840171-25556-1-git-send-email-rth@twiddle.net> <1373840171-25556-4-git-send-email-rth@twiddle.net> <8761w9wm50.fsf@blackfin.pond.sub.org> <51E67B7A.8000800@redhat.com> <51E69AE1.1060809@twiddle.net> In-Reply-To: <51E69AE1.1060809@twiddle.net> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: aliguori@us.ibm.com, Gerd Hoffmann , Markus Armbruster , qemu-devel@nongnu.org Il 17/07/2013 15:23, Richard Henderson ha scritto: > On 07/17/2013 04:09 AM, Paolo Bonzini wrote: >>> >>> Fails for me: >>> >>> qemu-system-x86_64: /work/armbru/qemu/exec.c:1927: memory_access_size: Assertion `l >= access_size_min' failed. >> >> This: >> >> unsigned access_size_min = mr->ops->impl.min_access_size; >> unsigned access_size_max = mr->ops->impl.max_access_size; >> >> must be respectively: >> >> unsigned access_size_min = 1; >> unsigned access_size_max = mr->ops->valid.max_access_size; >> >> access_size_min can be 1 because erroneous accesses must not crash >> QEMU, they should trigger exceptions in the guest or just return >> garbage (depending on the CPU). I'm not sure I understand the comment, >> placing a 4-byte field at the last byte of a region makes no sense >> (unless impl.unaligned is true). >> >> access_size_max can be mr->ops->valid.max_access_size because memory.c >> can and will still break accesses bigger than >> mr->ops->impl.max_access_size. >> >> Markus, can you try the minimal patch above? Or this one that also >> does the consequent simplifications. > > NAK. > > If you remove the check here, you're just trading it for one in the device. > The device told you that it can't support a 1 byte read. (Either that, or the > device incorrectly reported what it can actually do.) There are two parts to this. First of all, mr->ops->impl.min_access_size is definitely wrong. The device told me that the MMIO functions only know about 2-byte accesses, but that it _can_ support 1-, 2- and 4- byte reads (with coalescing done by memory.c). So I could change access_size_min to mr->ops->valid.min_access_size, which would also fix Markus's problem. But then, accesses smaller than mr->ops->valid.min_access_size are fine, they just result in exceptions or garbage reads (depending on the CPU). address_space_rw reports these errors just fine, memory_access_size's only purpose is to split address_space_rw's MMIO writes in a sensible manner. There is no error reporting because it is done in memory.c. In fact, I'm not even sure if users of memory_access_size (DMA to an MMIO destination) exist in real hardware. I'm curious if "BSAVE"ing 16-color EGA graphics works with a modern graphic card and a BIOS that doesn't use PIO. Paolo > The proper fix is to change the interface of memory_access_size such that it > can report errors. Indeed, very likely we should change it and its callers to > also support over-sized reads, like access_with_adjusted_size in memory.c. > > > r~ >