From: Richard Henderson <rth@twiddle.net>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: aliguori@us.ibm.com, Gerd Hoffmann <kraxel@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw
Date: Wed, 17 Jul 2013 07:29:30 -0700 [thread overview]
Message-ID: <51E6AA4A.9020101@twiddle.net> (raw)
In-Reply-To: <51E6A003.8070106@redhat.com>
On 07/17/2013 06:45 AM, Paolo Bonzini wrote:
>> NAK.
>>
>> If you remove the check here, you're just trading it for one in the device.
>> The device told you that it can't support a 1 byte read. (Either that, or the
>> device incorrectly reported what it can actually do.)
>
> There are two parts to this.
>
> First of all, mr->ops->impl.min_access_size is definitely wrong. The
> device told me that the MMIO functions only know about 2-byte accesses,
> but that it _can_ support 1-, 2- and 4- byte reads (with coalescing done
> by memory.c).
I don't know enough about the specific device (or even which device it was)
to know whether the IMPL and VALID fields are correct.
> So I could change access_size_min to
> mr->ops->valid.min_access_size, which would also fix Markus's problem.
No, you can't. At least not without changing all of the callers.
If you do as you suggest, the callers will invoke the device with a value of
SIZE that is illegal according to IMPL. We might as well crash now than later.
There are three possible solutions:
(1) Return an error from memory_access_size, change the callers to propagate
the error in some fashion. This isn't ideal, since in this case VALID
indicates that the guest access is correct.
(2) Return the implementation minimum, change the callers to interact with
the device using that minimum. With this scenario, we should likely
share code with access_with_adjusted_size.
(3) Determine that the device's impl.min_access_size is wrong and adjust it.
Responding to your earlier
> erroneous accesses must not crash
> QEMU, they should trigger exceptions in the guest or just return
> garbage (depending on the CPU).
I completely agree -- if we were talking about VALID. Since this is IMPL, it's
not an "erroneous access", but rather QEMU not being self-consistent.
And for internal logic errors, we've got asserts and aborts all over.
r~
next prev parent reply other threads:[~2013-07-17 14:29 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-14 22:16 [Qemu-devel] [PULL 0/5] alpha-softmmu fixes Richard Henderson
2013-07-14 22:16 ` [Qemu-devel] [PULL 1/5] hw/alpha: Don't use get_system_io Richard Henderson
2013-07-14 22:16 ` [Qemu-devel] [PULL 2/5] hw/alpha: Don't machine check on missing pci i/o Richard Henderson
2013-07-14 22:16 ` [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw Richard Henderson
2013-07-17 9:50 ` Markus Armbruster
2013-07-17 11:09 ` Paolo Bonzini
2013-07-17 13:23 ` Richard Henderson
2013-07-17 13:45 ` Paolo Bonzini
2013-07-17 14:29 ` Richard Henderson [this message]
2013-07-17 14:41 ` Paolo Bonzini
2013-07-17 15:50 ` Anthony Liguori
2013-07-17 17:32 ` Paolo Bonzini
2013-07-17 18:26 ` Richard Henderson
2013-07-17 18:57 ` Paolo Bonzini
2013-07-17 19:28 ` Richard Henderson
2013-07-17 19:56 ` Paolo Bonzini
2013-07-17 20:05 ` Richard Henderson
2013-07-17 18:28 ` Anthony Liguori
2013-07-14 22:16 ` [Qemu-devel] [PULL 4/5] hw/alpha: Drop latch_tmp hack Richard Henderson
2013-07-14 22:16 ` [Qemu-devel] [PULL 5/5] hw/alpha: Use SRM epoch Richard Henderson
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