From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40138) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V0A7y-00021s-Pw for qemu-devel@nongnu.org; Fri, 19 Jul 2013 08:49:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V0A7t-0005m5-MY for qemu-devel@nongnu.org; Fri, 19 Jul 2013 08:49:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:7410) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V0A7t-0005lm-Ee for qemu-devel@nongnu.org; Fri, 19 Jul 2013 08:49:37 -0400 Message-ID: <51E935C0.3020703@redhat.com> Date: Fri, 19 Jul 2013 14:49:04 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <51C75FA6.6080903@reactos.org> <51C7E21A.9090005@web.de> <8A36D64D-0625-49E1-9E59-391DAEEBD1FC@suse.de> <51E91E7D.1000302@ozlabs.ru> In-Reply-To: <51E91E7D.1000302@ozlabs.ru> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] BUG: Re: [PATCH v3 11/14] ioport: Switch dispatching to memory core layer List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexey Kardashevskiy Cc: Liu Ping Fan , Alexander Graf , qemu-devel , =?UTF-8?B?SGVydsOpIFBvdXNzaW5lYXU=?= , "Aneesh Kumar K.V" , "anthony@codemonkey.ws" , Jan Kiszka , =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Il 19/07/2013 13:09, Alexey Kardashevskiy ha scritto: > Hi! >=20 > This patch also breaks virtio on powerpc. I thought it was fixed > (reverted?) in the master branch from qemu.org but it is still there. W= hat > did I miss? It was not reverted, only the "DEVICE_LITTLE_ENDIAN" marking was. Let me check if I can reproduce this, it looks like a endianness problems reading virtio-blk config space. Paolo > Trying to load: from: disk ... virtioblk_read: Access beyond end of de= vice! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > virtioblk_read: Access beyond end of device! > [many of those] >=20 >=20 >=20 > On 07/11/2013 10:29 PM, Alexander Graf wrote: >> >> On 24.06.2013, at 08:07, Jan Kiszka wrote: >> >>> On 2013-06-23 22:50, Herv=C3=A9 Poussineau wrote: >>>> Jan Kiszka a =C3=A9crit : >>>>> From: Jan Kiszka >>>>> >>>>> The current ioport dispatcher is a complex beast, mostly due to the >>>>> need to deal with old portio interface users. But we can overcome i= t >>>>> without converting all portio users by embedding the required base >>>>> address of a MemoryRegionPortio access into that data structure. Th= at >>>>> removes the need to have the additional MemoryRegionIORange structu= re >>>>> in the loop on every access. >>>>> >>>>> To handle old portio memory ops, we simply install dispatching hand= lers >>>>> for portio memory regions when registering them with the memory cor= e. >>>>> This removes the need for the old_portio field. >>>>> >>>>> We can drop the additional aliasing of ioport regions and also the >>>>> special address space listener. cpu_in and cpu_out now simply call >>>>> address_space_read/write. And we can concentrate portio handling in= a >>>>> single source file. >>>>> >>>>> Signed-off-by: Jan Kiszka >>>>> --- >>>> >>>> ... >>>> >>>>> + >>>>> +static void portio_write(void *opaque, hwaddr addr, uint64_t data, >>>>> + unsigned size) >>>>> +{ >>>>> + MemoryRegionPortioList *mrpio =3D opaque; >>>>> + const MemoryRegionPortio *mrp =3D find_portio(mrpio, addr, siz= e, >>>>> true); >>>>> + >>>>> + if (mrp) { >>>>> + mrp->write(mrpio->portio_opaque, mrp->base + addr, data); >>>>> + } else if (size =3D=3D 2) { >>>>> + mrp =3D find_portio(mrpio, addr, 1, true); >>>>> + assert(mrp); >>>>> + mrp->write(mrpio->portio_opaque, mrp->base + addr, data & = 0xff); >>>>> + mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, dat= a >>>>>>> 8); >>>>> + } >>>>> +} >>>>> + >>>>> +static const MemoryRegionOps portio_ops =3D { >>>>> + .read =3D portio_read, >>>>> + .write =3D portio_write, >>>>> + .valid.unaligned =3D true, >>>>> + .impl.unaligned =3D true, >>>>> +}; >>>>> + >>>> >>>> You need to mark these operations as DEVICE_LITTLE_ENDIAN. >>>> In portio_write above, you clearly assume that data is in LE format. >>> >>> Anything behind PIO is little endian, of course. Will add this. >> >> This patch breaks VGA on PPC as it is in master today. >> >> >> Alex >> >>> >>>> >>>> This fixes PPC PReP emulation, which would otherwise be broken with = this >>>> patchset. >>> >>> Thanks, >>> Jan >>> >>> >> >> >=20 >=20