From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1YvP-0005YH-1d for qemu-devel@nongnu.org; Tue, 23 Jul 2013 05:30:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1YvN-00085g-OQ for qemu-devel@nongnu.org; Tue, 23 Jul 2013 05:30:30 -0400 Received: from mail-wg0-x22a.google.com ([2a00:1450:400c:c00::22a]:61787) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1YvN-00085Y-Iu for qemu-devel@nongnu.org; Tue, 23 Jul 2013 05:30:29 -0400 Received: by mail-wg0-f42.google.com with SMTP id j13so1612543wgh.5 for ; Tue, 23 Jul 2013 02:30:28 -0700 (PDT) Sender: Paolo Bonzini Message-ID: <51EE4D24.5010104@redhat.com> Date: Tue, 23 Jul 2013 11:30:12 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1374501278-31549-1-git-send-email-pbonzini@redhat.com> <51ED4362.8060709@redhat.com> <51ED4AC5.5030501@redhat.com> <51ED9334.2010409@reactos.org> In-Reply-To: <51ED9334.2010409@reactos.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 00/28] Memory API for 1.6: fix I/O port endianness mess List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?SGVydsOpIFBvdXNzaW5lYXU=?= Cc: Peter Maydell , aliguori@us.ibm.com, aik@ozlabs.ru, jan.kiszka@siemens.com, qemu-devel@nongnu.org, agraf@suse.de, aurelien@aurel32.net Il 22/07/2013 22:16, Hervé Poussineau ha scritto: >> PReP is an exception, but >> I think it could be rewritten to use an IOMMU memory region. > > PReP PCI I/O area is located at 0x80000000, up to 0xbf7fffff (in main > memory space region), while ISA I/O area is at 0x80000000, up to > 0x8000ffff (size=64KB) or up to 0x807ffffff for non-contiguous mode. The IOMMU memory region would let you implement non-contiguous mode without calling cpu_inb/cpu_outb. > However, as they are overlapped, some strange things can happen. > For example, IBM 40p firmware configures the PCI SCSI bar at 0x20000000 > (ie 0xa0000000 in main memory), while Linux sets bar to 0x1000 (ie > 0x80001000 in main memory), ie also in ISA I/O space. If BARs have a lower priority than assigned ISA I/O space, this should "just work" if you use an alias memory region for ISA I/O space. Gaps in the ISA I/O space will let you see through the ISA I/O space and access BARs. If BARs have a higher priority, you need to set the priority accordingly for the ISA I/O space alias (using memory_region_add_subregion_overlap), but that's it. By the way, i82378.c can also use memory_region_init_alias to initialize the memory regions that are passed to pci_register_bar. I didn't do this in this series. > I don't know exactly what you mean by an "IOMMU memory region", but how > would you modelize it, so that 0x80001000 and 0xa0000000 accesses are > redirected to PCI SCSI card, while 0x800003f8 redirects (for example) to > an ISA serial port? See above. Paolo > If you create a new memory region for ISA I/O space, and you redirect > all accesses from 0x80000000-0x8000ffff to this new address space, > 0x80001000 won't work to access the SCSI I/O bar (located in the PCI I/O > address space).