From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56130) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V3f9S-0002BX-Od for qemu-devel@nongnu.org; Mon, 29 Jul 2013 00:33:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V3f9M-0007ov-KC for qemu-devel@nongnu.org; Mon, 29 Jul 2013 00:33:42 -0400 Received: from cantor2.suse.de ([195.135.220.15]:48638 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V3f9M-0007on-Aw for qemu-devel@nongnu.org; Mon, 29 Jul 2013 00:33:36 -0400 Message-ID: <51F5F099.4030504@suse.de> Date: Mon, 29 Jul 2013 06:33:29 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1371195048-19618-1-git-send-email-leon.alrae@imgtec.com> <1371195048-19618-3-git-send-email-leon.alrae@imgtec.com> In-Reply-To: <1371195048-19618-3-git-send-email-leon.alrae@imgtec.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 2/6] mips_malta: correct reading MIPS revision at 0x1fc00010 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Leon Alrae , aurelien@aurel32.net Cc: paul.burton@imgtec.com, qemu-devel@nongnu.org, Anthony Liguori , yongbok.kim@imgtec.com, Paolo Bonzini , cristian.cuna@imgtec.com Am 14.06.2013 09:30, schrieb Leon Alrae: > From: Paul Burton >=20 > Rather than modifying the BIOS code at its original location, copy it > for the 0x1fc00000 region & modify the copy. This means the original > ROM code is correctly readable at 0x1e000010 whilst the MIPS revision > is readable at 0x1fc00010. >=20 > Additionally the code previously operated on target memory which would > later be overwritten by the BIOS image upon CPU reset if the -bios > argument was used to specify the BIOS image. This led to the written > MIPS revision being lost. Copying using rom_copy when -bios is used > fixes this issue. >=20 > Signed-off-by: Paul Burton > Signed-off-by: Leon Alrae > --- > hw/mips/mips_malta.c | 25 +++++++++++++++++-------- > 1 files changed, 17 insertions(+), 8 deletions(-) For some reason this commit breaks `make check`, please revert or fix. Andreas >=20 > diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c > index 4def898..9117ae4 100644 > --- a/hw/mips/mips_malta.c > +++ b/hw/mips/mips_malta.c > @@ -789,7 +789,7 @@ void mips_malta_init(QEMUMachineInitArgs *args) > pflash_t *fl; > MemoryRegion *system_memory =3D get_system_memory(); > MemoryRegion *ram =3D g_new(MemoryRegion, 1); > - MemoryRegion *bios, *bios_alias =3D g_new(MemoryRegion, 1); > + MemoryRegion *bios, *bios_copy =3D g_new(MemoryRegion, 1); > target_long bios_size =3D FLASH_SIZE; > int64_t kernel_entry; > PCIBus *pci_bus; > @@ -929,14 +929,23 @@ void mips_malta_init(QEMUMachineInitArgs *args) > #endif > } > =20 > - /* Map the BIOS at a 2nd physical location, as on the real board. = */ > - memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZ= E); > - memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_ali= as); > + /* > + * Map the BIOS at a 2nd physical location, as on the real board. > + * Copy it so that we can patch in the MIPS revision, which cannot= be > + * handled by an overlapping region as the resulting ROM code subp= age > + * regions are not executable. > + */ > + memory_region_init_ram(bios_copy, "bios.1fc", BIOS_SIZE); > + if (!rom_copy(memory_region_get_ram_ptr(bios_copy), > + FLASH_ADDRESS, bios_size)) { > + memcpy(memory_region_get_ram_ptr(bios_copy), > + memory_region_get_ram_ptr(bios), bios_size); > + } > + memory_region_set_readonly(bios_copy, true); > + memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_cop= y); > =20 > - /* Board ID =3D 0x420 (Malta Board with CoreLV) > - XXX: theoretically 0x1e000010 should map to flash and 0x1fc0001= 0 should > - map to the board ID. */ > - stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420); > + /* Board ID =3D 0x420 (Malta Board with CoreLV) */ > + stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420); > =20 > /* Init internal devices */ > cpu_mips_irq_init_cpu(env); >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg