From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55310) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V5Jbb-0007am-G5 for qemu-devel@nongnu.org; Fri, 02 Aug 2013 13:57:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V5JCp-0007wN-28 for qemu-devel@nongnu.org; Fri, 02 Aug 2013 13:32:06 -0400 Received: from cantor2.suse.de ([195.135.220.15]:55137 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V5JCo-0007wH-NW for qemu-devel@nongnu.org; Fri, 02 Aug 2013 13:31:58 -0400 Message-ID: <51FBED0A.7010502@suse.de> Date: Fri, 02 Aug 2013 19:31:54 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1375109277-25561-1-git-send-email-imammedo@redhat.com> <1375109277-25561-8-git-send-email-imammedo@redhat.com> In-Reply-To: <1375109277-25561-8-git-send-email-imammedo@redhat.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 7/7] pc: limit 64 bit hole to 2G by default List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov , mst@redhat.com Cc: qemu-devel@nongnu.org, Richard Henderson Am 29.07.2013 16:47, schrieb Igor Mammedov: > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index b0b98a8..a2b9d88 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c [...] > @@ -1003,15 +1004,27 @@ typedef struct PcRomPciInfo { > static void pc_fw_cfg_guest_info(PcGuestInfo *guest_info) > { > PcRomPciInfo *info; > + Object *pci_info; > + bool ambiguous =3D false; > + > if (!guest_info->has_pci_info || !guest_info->fw_cfg) { > return; > } > + pci_info =3D object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &a= mbiguous); > + g_assert(!ambiguous); > + if (!pci_info) { > + return; > + } > =20 > info =3D g_malloc(sizeof *info); > - info->w32_min =3D cpu_to_le64(guest_info->pci_info.w32.begin); > - info->w32_max =3D cpu_to_le64(guest_info->pci_info.w32.end); > - info->w64_min =3D cpu_to_le64(guest_info->pci_info.w64.begin); > - info->w64_max =3D cpu_to_le64(guest_info->pci_info.w64.end); > + info->w32_min =3D cpu_to_le64(object_property_get_int(pci_info, > + PCI_HOST_PROP_PCI_HOLE_START, NULL)); > + info->w32_max =3D cpu_to_le64(object_property_get_int(pci_info, > + PCI_HOST_PROP_PCI_HOLE_END, NULL)); > + info->w64_min =3D cpu_to_le64(object_property_get_int(pci_info, > + PCI_HOST_PROP_PCI_HOLE64_START, NULL))= ; > + info->w64_max =3D cpu_to_le64(object_property_get_int(pci_info, > + PCI_HOST_PROP_PCI_HOLE64_END, NULL)); > /* Pass PCI hole info to guest via a side channel. > * Required so guest PCI enumeration does the right thing. */ > fw_cfg_add_file(guest_info->fw_cfg, "etc/pci-info", info, sizeof *= info); I wonder, if we're passing PcRomInfo out to SeaBIOS via fw_cfg, shouldn't it be QEMU_PACKED just in case? Not strictly related to this patch, obviously. Regards, Andreas /* pci-info ROM file. Little endian format */ typedef struct PcRomPciInfo { uint64_t w32_min; uint64_t w32_max; uint64_t w64_min; uint64_t w64_max; } PcRomPciInfo; --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg