From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43514) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V6Lyi-0007JE-D4 for qemu-devel@nongnu.org; Mon, 05 Aug 2013 10:41:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V6Lyc-000581-Kc for qemu-devel@nongnu.org; Mon, 05 Aug 2013 10:41:44 -0400 Sender: Paolo Bonzini Message-ID: <51FFB98E.4020207@redhat.com> Date: Mon, 05 Aug 2013 16:41:18 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1375713401-24848-1-git-send-email-afaerber@suse.de> <1375713401-24848-3-git-send-email-afaerber@suse.de> In-Reply-To: <1375713401-24848-3-git-send-email-afaerber@suse.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH for-1.6 v2 2/2] pci-bridge: Move common class initializations to base type List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= , qemu-ppc@nongnu.org, agraf@suse.de, qemu-devel@nongnu.org On 08/05/2013 04:36 PM, Andreas Färber wrote: > Set PCIDeviceClass::is_bridge as well as PCIDeviceClass::config_write(), > PCIDeviceClass::exit() and DeviceClass::reset() defaults directly for > TYPE_PCI_BRIDGE (complements f055e96bd4311d287c0e03faec02a1bdbc351925). > > This avoids another pci_bridge_config_write() missing somewhere, unless > explicitly overridden. > > Reported-by: Gerd Hoffmann > Signed-off-by: Andreas Färber Why for 1.6? Paolo > --- > hw/pci-bridge/dec.c | 4 ---- > hw/pci-bridge/i82801b11.c | 2 -- > hw/pci-bridge/ioh3420.c | 1 - > hw/pci-bridge/pci_bridge_dev.c | 1 - > hw/pci-bridge/xio3130_downstream.c | 1 - > hw/pci-bridge/xio3130_upstream.c | 1 - > hw/pci-host/apb.c | 4 ---- > hw/pci/pci_bridge.c | 12 ++++++++++++ > 8 files changed, 12 insertions(+), 14 deletions(-) > > diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c > index e5e3be8..379f9f0 100644 > --- a/hw/pci-bridge/dec.c > +++ b/hw/pci-bridge/dec.c > @@ -62,13 +62,9 @@ static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data) > PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); > > k->init = dec_pci_bridge_initfn; > - k->exit = pci_bridge_exitfn; > k->vendor_id = PCI_VENDOR_ID_DEC; > k->device_id = PCI_DEVICE_ID_DEC_21154; > - k->config_write = pci_bridge_write_config; > - k->is_bridge = 1; > dc->desc = "DEC 21154 PCI-PCI bridge"; > - dc->reset = pci_bridge_reset; > dc->vmsd = &vmstate_pci_device; > } > > diff --git a/hw/pci-bridge/i82801b11.c b/hw/pci-bridge/i82801b11.c > index 14cd7fd..ab0c8e1 100644 > --- a/hw/pci-bridge/i82801b11.c > +++ b/hw/pci-bridge/i82801b11.c > @@ -85,12 +85,10 @@ static void i82801b11_bridge_class_init(ObjectClass *klass, void *data) > PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); > DeviceClass *dc = DEVICE_CLASS(klass); > > - k->is_bridge = 1; > k->vendor_id = PCI_VENDOR_ID_INTEL; > k->device_id = PCI_DEVICE_ID_INTEL_82801BA_11; > k->revision = ICH9_D2P_A2_REVISION; > k->init = i82801b11_bridge_initfn; > - k->config_write = pci_bridge_write_config; > set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); > } > > diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c > index 0f7f209..2748b06 100644 > --- a/hw/pci-bridge/ioh3420.c > +++ b/hw/pci-bridge/ioh3420.c > @@ -200,7 +200,6 @@ static void ioh3420_class_init(ObjectClass *klass, void *data) > PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); > > k->is_express = 1; > - k->is_bridge = 1; > k->config_write = ioh3420_write_config; > k->init = ioh3420_initfn; > k->exit = ioh3420_exitfn; > diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c > index a9392c7..716d0af 100644 > --- a/hw/pci-bridge/pci_bridge_dev.c > +++ b/hw/pci-bridge/pci_bridge_dev.c > @@ -142,7 +142,6 @@ static void pci_bridge_dev_class_init(ObjectClass *klass, void *data) > k->vendor_id = PCI_VENDOR_ID_REDHAT; > k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE; > k->class_id = PCI_CLASS_BRIDGE_PCI; > - k->is_bridge = 1, > dc->desc = "Standard PCI Bridge"; > dc->reset = qdev_pci_bridge_dev_reset; > dc->props = pci_bridge_dev_properties; > diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c > index 94f9781..07da9bf 100644 > --- a/hw/pci-bridge/xio3130_downstream.c > +++ b/hw/pci-bridge/xio3130_downstream.c > @@ -167,7 +167,6 @@ static void xio3130_downstream_class_init(ObjectClass *klass, void *data) > PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); > > k->is_express = 1; > - k->is_bridge = 1; > k->config_write = xio3130_downstream_write_config; > k->init = xio3130_downstream_initfn; > k->exit = xio3130_downstream_exitfn; > diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstream.c > index 59f97f6..def08c8 100644 > --- a/hw/pci-bridge/xio3130_upstream.c > +++ b/hw/pci-bridge/xio3130_upstream.c > @@ -146,7 +146,6 @@ static void xio3130_upstream_class_init(ObjectClass *klass, void *data) > PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); > > k->is_express = 1; > - k->is_bridge = 1; > k->config_write = xio3130_upstream_write_config; > k->init = xio3130_upstream_initfn; > k->exit = xio3130_upstream_exitfn; > diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c > index 92f289f..1cb2ef4 100644 > --- a/hw/pci-host/apb.c > +++ b/hw/pci-host/apb.c > @@ -553,14 +553,10 @@ static void pbm_pci_bridge_class_init(ObjectClass *klass, void *data) > PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); > > k->init = apb_pci_bridge_initfn; > - k->exit = pci_bridge_exitfn; > k->vendor_id = PCI_VENDOR_ID_SUN; > k->device_id = PCI_DEVICE_ID_SUN_SIMBA; > k->revision = 0x11; > - k->config_write = pci_bridge_write_config; > - k->is_bridge = 1; > set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); > - dc->reset = pci_bridge_reset; > dc->vmsd = &vmstate_pci_device; > } > > diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c > index a90671d..23a5c7d 100644 > --- a/hw/pci/pci_bridge.c > +++ b/hw/pci/pci_bridge.c > @@ -405,11 +405,23 @@ void pci_bridge_map_irq(PCIBridge *br, const char* bus_name, > br->bus_name = bus_name; > } > > +static void pci_bridge_class_init(ObjectClass *oc, void *data) > +{ > + DeviceClass *dc = DEVICE_CLASS(oc); > + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); > + > + pdc->is_bridge = 1; > + pdc->exit = pci_bridge_exitfn; > + pdc->config_write = pci_bridge_write_config; > + dc->reset = pci_bridge_reset; > +} > + > static const TypeInfo pci_bridge_type_info = { > .name = TYPE_PCI_BRIDGE, > .parent = TYPE_PCI_DEVICE, > .instance_size = sizeof(PCIBridge), > .abstract = true, > + .class_init = pci_bridge_class_init, > }; > > static void pci_bridge_register_types(void) >