From: Claudio Fontana <cfontana@suse.de>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org,
Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PATCH v2 1/3] target/arm: Restrict v8M IDAU to TCG
Date: Tue, 9 Mar 2021 14:41:04 +0100 [thread overview]
Message-ID: <51ae2fad-f20e-27f2-2f7b-b7dca331dea3@suse.de> (raw)
In-Reply-To: <20210221222617.2579610-2-f4bug@amsat.org>
On 2/21/21 11:26 PM, Philippe Mathieu-Daudé wrote:
> IDAU is specific to M-profile. KVM only supports A-profile.
> Restrict this interface to TCG, as it is pointless (and
> confusing) on a KVM-only build.
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This one breaks the KVM tests hard though (most of them).
I will try to figure out why.
Ciao,
Claudio
> ---
> target/arm/cpu.c | 7 -------
> target/arm/cpu_tcg.c | 8 ++++++++
> 2 files changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index b8bc89e71fc..a772fd4926f 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -2380,12 +2380,6 @@ static const TypeInfo arm_cpu_type_info = {
> .class_init = arm_cpu_class_init,
> };
>
> -static const TypeInfo idau_interface_type_info = {
> - .name = TYPE_IDAU_INTERFACE,
> - .parent = TYPE_INTERFACE,
> - .class_size = sizeof(IDAUInterfaceClass),
> -};
> -
> static void arm_cpu_register_types(void)
> {
> const size_t cpu_count = ARRAY_SIZE(arm_cpus);
> @@ -2399,7 +2393,6 @@ static void arm_cpu_register_types(void)
> if (cpu_count) {
> size_t i;
>
> - type_register_static(&idau_interface_type_info);
> for (i = 0; i < cpu_count; ++i) {
> arm_cpu_register(&arm_cpus[i]);
> }
> diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
> index c29b434c60d..fb07a336939 100644
> --- a/target/arm/cpu_tcg.c
> +++ b/target/arm/cpu_tcg.c
> @@ -14,6 +14,7 @@
> #include "hw/core/tcg-cpu-ops.h"
> #endif /* CONFIG_TCG */
> #include "internals.h"
> +#include "target/arm/idau.h"
>
> /* CPU models. These are not needed for the AArch64 linux-user build. */
> #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
> @@ -739,10 +740,17 @@ static const ARMCPUInfo arm_tcg_cpus[] = {
> { .name = "pxa270-c5", .initfn = pxa270c5_initfn },
> };
>
> +static const TypeInfo idau_interface_type_info = {
> + .name = TYPE_IDAU_INTERFACE,
> + .parent = TYPE_INTERFACE,
> + .class_size = sizeof(IDAUInterfaceClass),
> +};
> +
> static void arm_tcg_cpu_register_types(void)
> {
> size_t i;
>
> + type_register_static(&idau_interface_type_info);
> for (i = 0; i < ARRAY_SIZE(arm_tcg_cpus); ++i) {
> arm_cpu_register(&arm_tcg_cpus[i]);
> }
>
next prev parent reply other threads:[~2021-03-09 13:42 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-21 22:26 [PATCH v2 0/3] target/arm: Restrict v7A TCG cpus to TCG accel Philippe Mathieu-Daudé
2021-02-21 22:26 ` [PATCH v2 1/3] target/arm: Restrict v8M IDAU to TCG Philippe Mathieu-Daudé
2021-03-09 13:41 ` Claudio Fontana [this message]
2021-03-09 14:18 ` Philippe Mathieu-Daudé
2021-03-09 14:55 ` Claudio Fontana
2021-03-10 11:46 ` Claudio Fontana
2021-03-10 13:42 ` Philippe Mathieu-Daudé
2021-03-10 13:45 ` Claudio Fontana
2021-03-10 14:00 ` Claudio Fontana
2021-03-10 14:19 ` Philippe Mathieu-Daudé
2021-02-21 22:26 ` [PATCH v2 2/3] target/arm/cpu: Update coding style to make checkpatch.pl happy Philippe Mathieu-Daudé
2021-02-21 22:26 ` [PATCH v2 3/3] target/arm: Restrict v7A TCG cpus to TCG accel Philippe Mathieu-Daudé
2021-03-11 10:43 ` Claudio Fontana
2021-03-18 9:47 ` Philippe Mathieu-Daudé
2021-03-18 9:56 ` Claudio Fontana
2021-03-18 10:47 ` Philippe Mathieu-Daudé
2021-03-18 11:09 ` Philippe Mathieu-Daudé
2021-03-18 11:21 ` Peter Maydell
2021-03-18 11:31 ` Philippe Mathieu-Daudé
2021-03-18 11:38 ` Peter Maydell
2021-03-18 12:37 ` Andrew Jones
2021-03-18 12:50 ` Claudio Fontana
2021-03-18 13:14 ` Philippe Mathieu-Daudé
2021-03-05 14:38 ` [PATCH v2 0/3] " Peter Maydell
2021-03-06 15:13 ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=51ae2fad-f20e-27f2-2f7b-b7dca331dea3@suse.de \
--to=cfontana@suse.de \
--cc=f4bug@amsat.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).