From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56687) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V6wOv-0006Ju-H6 for qemu-devel@nongnu.org; Wed, 07 Aug 2013 01:35:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V6wOp-0005Mh-As for qemu-devel@nongnu.org; Wed, 07 Aug 2013 01:35:13 -0400 Message-ID: <5201DC85.90001@suse.de> Date: Wed, 07 Aug 2013 07:35:01 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1375836424-773-1-git-send-email-anton@samba.org> <1375836424-773-3-git-send-email-anton@samba.org> In-Reply-To: <1375836424-773-3-git-send-email-anton@samba.org> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 2/5] target-ppc: USE LPCR_ILE to control exception endian on POWER7 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anton Blanchard Cc: Anthony Liguori , qemu-ppc@nongnu.org, Alexander Graf , qemu-devel@nongnu.org Am 07.08.2013 02:47, schrieb Anton Blanchard: > On POWER7, LPCR_ILE is used to control what endian guests take > their exceptions in so use it instead of MSR_ILE. >=20 > Signed-off-by: Anton Blanchard > --- > target-ppc/cpu.h | 2 ++ > target-ppc/excp_helper.c | 10 ++++++++++ > 2 files changed, 12 insertions(+) >=20 > diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h > index 711db08..422a6bb 100644 > --- a/target-ppc/cpu.h > +++ b/target-ppc/cpu.h > @@ -453,6 +453,8 @@ struct ppc_slb_t { > #define MSR_RI 1 /* Recoverable interrupt 1 = */ > #define MSR_LE 0 /* Little-endian mode 1 = hflags */ > =20 > +#define LPCR_ILE (1 << (63-38)) > + > #define msr_sf ((env->msr >> MSR_SF) & 1) > #define msr_isf ((env->msr >> MSR_ISF) & 1) > #define msr_shv ((env->msr >> MSR_SHV) & 1) > diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c > index e9fcad8..e957761 100644 > --- a/target-ppc/excp_helper.c > +++ b/target-ppc/excp_helper.c > @@ -611,9 +611,19 @@ static inline void powerpc_excp(PowerPCCPU *cpu, i= nt excp_model, int excp) > tlb_flush(env, 1); > } > =20 > +#ifdef TARGET_PPC64 > + if (excp_model =3D=3D POWERPC_EXCP_POWER7) { > + if (env->spr[SPR_LPCR] & LPCR_ILE) { > + new_msr |=3D (target_ulong)1 << MSR_LE; > + } > + } else if (msr_ile) { > + new_msr |=3D (target_ulong)1 << MSR_LE; > + } > +#else You could just do ... } else #endif to spare duplicating the msr_ile path. Andreas > if (msr_ile) { > new_msr |=3D (target_ulong)1 << MSR_LE; > } > +#endif > =20 > /* Jump to handler */ > vector =3D env->excp_vectors[excp]; >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg