From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33327) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V8lkf-0005yj-PT for qemu-devel@nongnu.org; Mon, 12 Aug 2013 02:37:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V8lkZ-0000Ot-1B for qemu-devel@nongnu.org; Mon, 12 Aug 2013 02:37:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:60126) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V8lkY-0000OU-OB for qemu-devel@nongnu.org; Mon, 12 Aug 2013 02:37:06 -0400 Message-ID: <5208828C.6000105@redhat.com> Date: Mon, 12 Aug 2013 08:37:00 +0200 From: Gerd Hoffmann MIME-Version: 1.0 References: <520257F8.1080501@redhat.com> <20130807145312.GA14308@redhat.com> <52034F73.4040904@redhat.com> <20130808083732.GB26837@redhat.com> <52035D88.6040002@redhat.com> <20130808095226.GB27298@redhat.com> <5203712C.8090202@redhat.com> <20130808141347.GA30200@redhat.com> <5203B1B7.5000102@redhat.com> <20130809041306.GB6869@morn.localdomain> <20130809154918.GA19032@redhat.com> In-Reply-To: <20130809154918.GA19032@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [SeaBIOS] [PATCH] acpi: hide 64-bit PCI hole for Windows XP List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Paolo Bonzini , Kevin O'Connor , seabios@seabios.org, qemu-devel@nongnu.org, lersek@redhat.com Hi, > If we make it a rule that PCI is`setup before ACPI tables > are read, then QEMU can do the patching itself when > it detects BIOS reading the tables. Approach makes sense to me. The ordering constrain shouldn't be a big burden, hardware detection+bringup (including pci setup) is the first thing done by the firmware, loading/generating acpi tables is one of the last things. And it avoids the need to communicate the addresses (or patch locations) between qemu+firmware. What do you want to use this for? pmbase and xbar are simple, they are just a single register read. pci io windows needs a root bus scan, but should be doable too. > Gerd, Laszlo,others, does this rule work for alternative firmwares? It surely works for coreboot, and I would be very surprised if this causes trouble for ovmf. cheers, Gerd