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Date: Tue, 13 Aug 2013 09:59:29 +0100
From: James Hogan <james.hogan@imgtec.com>
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Subject: Re: [Qemu-devel] [PATCH] tcg/mips: fix invalid op definition errors
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To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org, Aurelien Jarno <aurelien@aurel32.net>

On 08/08/13 17:10, Richard Henderson wrote:
> On 08/08/2013 04:40 AM, James Hogan wrote:
>> tcg/mips/tcg-target.h defines various operations conditionally depending
>> upon the isa revision, however these operations are included in
>> mips_op_defs[] unconditionally resulting in the following runtime errors
>> if CONFIG_DEBUG_TCG is defined:
>>
>> Invalid op definition for movcond_i32
>> Invalid op definition for rotl_i32
>> Invalid op definition for rotr_i32
>> Invalid op definition for deposit_i32
>> Invalid op definition for bswap16_i32
>> Invalid op definition for bswap32_i32
>> tcg/tcg.c:1196: tcg fatal error
>>
>> Fix with ifdefs like the i386 backend does for movcond_i32.
>>
>> Signed-off-by: James Hogan <james.hogan@imgtec.com>
>> Cc: Aurelien Jarno <aurelien@aurel32.net>
>> Cc: Richard Henderson <rth@twiddle.net>
> 
> Reviewed-by: Richard Henderson <rth@twiddle.net>

Thanks,

> Perfect for 1.6.
> 
> For 1.7 it would be really nice if you could figure out some way to make
> these runtime tests, instead of ifdefs.  I'd have said getauxval(3), but
> the mips kernel doesn't seem to define any identifying bits.  Perhaps
> that's the first thing that ought to get fixed...

Yes, the auxvec sounds ideal for this, and AT_HWCAP is already used for
cpuid on x86. There were some patches a while ago for exposing the C0
configX registers through sysfs, but auxvec sounds cleaner IMO.

Cheers
James