From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59900) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VCvpi-0000xX-JR for qemu-devel@nongnu.org; Fri, 23 Aug 2013 14:11:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VCvpY-0004RP-H0 for qemu-devel@nongnu.org; Fri, 23 Aug 2013 14:11:38 -0400 Received: from mail-yh0-x22b.google.com ([2607:f8b0:4002:c01::22b]:65198) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VCvpY-0004R8-D0 for qemu-devel@nongnu.org; Fri, 23 Aug 2013 14:11:28 -0400 Received: by mail-yh0-f43.google.com with SMTP id z20so235620yhz.30 for ; Fri, 23 Aug 2013 11:11:28 -0700 (PDT) Sender: Richard Henderson Message-ID: <5217A5BC.80409@twiddle.net> Date: Fri, 23 Aug 2013 11:11:08 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1377274359-8707-1-git-send-email-peter.maydell@linaro.org> <1377274359-8707-3-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1377274359-8707-3-git-send-email-peter.maydell@linaro.org> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/2] target-arm: Avoid "1 << 31" undefined behaviour List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org, patches@linaro.org On 08/23/2013 09:12 AM, Peter Maydell wrote: > #define CPSR_V (1 << 28) > #define CPSR_C (1 << 29) > #define CPSR_Z (1 << 30) > -#define CPSR_N (1 << 31) > +#define CPSR_N (1U << 31) > #define CPSR_NZCV (CPSR_N | CPSR_Z | CPSR_C | CPSR_V) You'd be better off making all of the CPSR bits unsigned, I think. r~