From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45751) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VE177-0002V9-Vt for qemu-devel@nongnu.org; Mon, 26 Aug 2013 14:02:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VE16z-0005RW-BN for qemu-devel@nongnu.org; Mon, 26 Aug 2013 14:02:05 -0400 Received: from mail-gh0-x231.google.com ([2607:f8b0:4002:c05::231]:60630) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VE16z-0005RS-7e for qemu-devel@nongnu.org; Mon, 26 Aug 2013 14:01:57 -0400 Received: by mail-gh0-f177.google.com with SMTP id f20so910021ghb.22 for ; Mon, 26 Aug 2013 11:01:55 -0700 (PDT) Sender: Richard Henderson Message-ID: <521B980F.4040208@twiddle.net> Date: Mon, 26 Aug 2013 11:01:51 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1377270586-14753-1-git-send-email-yongbok.kim@imgtec.com> In-Reply-To: <1377270586-14753-1-git-send-email-yongbok.kim@imgtec.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] mips_malta: support up to 2GiB RAM List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Yongbok Kim Cc: james.hogan@imgtec.com, paul.burton@imgtec.com, qemu-devel@nongnu.org, markos.chandras@imgtec.com, leon.alrae@imgtec.com, aurelien@aurel32.net On 08/23/2013 08:09 AM, Yongbok Kim wrote: > + /* alias for pre IO hole access */ > + memory_region_init_alias(ram_low_preio, NULL, "mips_malta_low_preio.ram", > + ram_high, 0, MIN(ram_size, (256 << 20))); > + memory_region_add_subregion(system_memory, 0, ram_low_preio); > + > + /* alias for post IO hole access, if there is enough RAM */ > + if (ram_size > (512 << 20)) { > + ram_low_postio = g_new(MemoryRegion, 1); > + memory_region_init_alias(ram_low_postio, NULL, > + "mips_malta_low_postio.ram", > + ram_high, 512 << 20, > + ram_size - (512 << 20)); > + memory_region_add_subregion(system_memory, 512 << 20, ram_low_postio); > + } This sort of thing is what subregion prioirities are for. Ideally you'd have one alias region, with lower priority than the IO hole. Of course, it looks like most of gt64xxx_pci.c needs cleaning up for proper usage of the memory region infrastructure before that can happen... r~