From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40863) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VFNrO-0004Ec-Hs for qemu-devel@nongnu.org; Fri, 30 Aug 2013 08:31:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VFNrH-0008Ri-6T for qemu-devel@nongnu.org; Fri, 30 Aug 2013 08:31:30 -0400 Received: from cantor2.suse.de ([195.135.220.15]:39393 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VFNrG-0008R2-Tw for qemu-devel@nongnu.org; Fri, 30 Aug 2013 08:31:23 -0400 Message-ID: <52209095.5030702@suse.de> Date: Fri, 30 Aug 2013 14:31:17 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1377849232-27822-1-git-send-email-pingfank@linux.vnet.ibm.com> <1377849232-27822-4-git-send-email-pingfank@linux.vnet.ibm.com> In-Reply-To: <1377849232-27822-4-git-send-email-pingfank@linux.vnet.ibm.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3 3/3] hpet: entitle more irq pins for hpet List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Liu Ping Fan Cc: Paolo Bonzini , qemu-devel@nongnu.org, Anthony Liguori , Jan Kiszka Am 30.08.2013 09:53, schrieb Liu Ping Fan: > On q35 machine, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~2= 3 > of ioapic can be dynamically assigned to hpet as guest chooses. >=20 > Signed-off-by: Liu Ping Fan > --- > hw/i386/pc.c | 8 +++++++- > hw/timer/hpet.c | 12 ++++++++++-- > 2 files changed, 17 insertions(+), 3 deletions(-) >=20 > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index 09c10ac..bb23d99 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -1217,6 +1217,12 @@ static const MemoryRegionOps ioportF0_io_ops =3D= { > }, > }; > =20 > +static void hpet_intcap_set(DeviceState *dev) > +{ > + /* For guest bug compatibility, only IRQ2 is reserved for hpet on = q35 */ > + qdev_prop_set_uint32(dev, "intcap", 0x4); > +} > + > void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, > ISADevice **rtc_state, > ISADevice **floppy, > @@ -1247,7 +1253,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_i= rq *gsi, > * when the HPET wants to take over. Thus we have to disable the l= atter. > */ > if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())= ) { > - hpet =3D sysbus_try_create_simple("hpet", NULL, HPET_BASE, NUL= L); > + hpet =3D sysbus_try_create_simple("hpet", hpet_intcap_set, HPE= T_BASE, NULL); > =20 > if (hpet) { > for (i =3D 0; i < GSI_NUM_PINS; i++) { As PMM has said, this is unnecessary. Just use qdev_create(), qdev_set_prop_*(), qdev_init_nofail(), sysbus_mmio_map(). (This code seems not much QOM'ified yet.) > diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c > index 1139448..2e19ff5 100644 > --- a/hw/timer/hpet.c > +++ b/hw/timer/hpet.c > @@ -25,6 +25,7 @@ > */ > =20 > #include "hw/hw.h" > +#include "hw/boards.h" > #include "hw/i386/pc.h" > #include "ui/console.h" > #include "qemu/timer.h" > @@ -42,6 +43,11 @@ > =20 > #define HPET_MSI_SUPPORT 0 > =20 > +/* only IRQ2 allowed for pc-1.6 and former */ > +#define HPET_TN_INT_CAP_PC (0x4ULL << 32) > +/* Hpet can use non-legacy IRQ16~23, and an IRQ2 ,IRQ8 */ > +#define HPET_TN_INT_CAP_DEFAULT 0xff0104ULL > + > #define TYPE_HPET "hpet" > #define HPET(obj) OBJECT_CHECK(HPETState, (obj), TYPE_HPET) > =20 > @@ -73,6 +79,7 @@ typedef struct HPETState { > uint8_t rtc_irq_level; > qemu_irq pit_enabled; > uint8_t num_timers; > + uint32_t intcap; > HPETTimer timer[HPET_MAX_TIMERS]; > =20 > /* Memory-mapped, software visible registers */ > @@ -663,8 +670,8 @@ static void hpet_reset(DeviceState *d) > if (s->flags & (1 << HPET_MSI_SUPPORT)) { > timer->config |=3D HPET_TN_FSB_CAP; > } > - /* advertise availability of ioapic inti2 */ > - timer->config |=3D 0x00000004ULL << 32; > + /* advertise availability of ioapic int */ > + timer->config |=3D (uint64_t)s->intcap << 32; > timer->period =3D 0ULL; > timer->wrap_flag =3D 0; > } > @@ -753,6 +760,7 @@ static void hpet_realize(DeviceState *dev, Error **= errp) > static Property hpet_device_properties[] =3D { > DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS= ), > DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false), > + DEFINE_PROP_UINT32("intcap", HPETState, intcap, HPET_TN_INT_CAP_DE= FAULT), What is "intcap"? It sounds like capabilities? In that case DEFINE_PROP_BIT() might be a more appropriate way to model individually tweakable properties? Either way, the property name could probably use some love for clarity - there is no explanation for users. Regards, Andreas > DEFINE_PROP_END_OF_LIST(), > }; > =20 >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg