From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59979) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VHgFg-00084z-8G for qemu-devel@nongnu.org; Thu, 05 Sep 2013 16:34:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VHgFX-0006Wa-Q2 for qemu-devel@nongnu.org; Thu, 05 Sep 2013 16:34:04 -0400 Received: from mail-qa0-x233.google.com ([2607:f8b0:400d:c00::233]:54770) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VHgFX-0006WU-Kl for qemu-devel@nongnu.org; Thu, 05 Sep 2013 16:33:55 -0400 Received: by mail-qa0-f51.google.com with SMTP id bv4so44009qab.3 for ; Thu, 05 Sep 2013 13:33:55 -0700 (PDT) Sender: Richard Henderson Message-ID: <5228EAAE.1040605@twiddle.net> Date: Thu, 05 Sep 2013 13:33:50 -0700 From: Richard Henderson MIME-Version: 1.0 References: <5228E6DF.6090301@weilnetz.de> In-Reply-To: <5228E6DF.6090301@weilnetz.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] tci: Add implementation of rotl_i64, rotr_i64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Stefan Weil Cc: Jay Foad , qemu-devel@nongnu.org On 09/05/2013 01:17 PM, Stefan Weil wrote: > I added assertions for (t2 > 0) and (t2 < 64). They never raised an abort. > Are those cases possible? We already have similar code for 32 bit shifts, > and tcg/optimize.c also includes an implementation which is identical to > my rotl_i64, rotr_i64. It is possible, but very rare. In the tcg optimizer, by looking through constants that the tcg-op.h routines couldn't filter. In the tci backend by seeing the real data that wasn't constant for the optimizer. We should handle zero and modulo count rotates in both places. r~