* [Qemu-devel] Disabling IRQ error @ 2013-09-10 7:25 Xie Xianshan 2013-09-10 8:23 ` Max Filippov 0 siblings, 1 reply; 9+ messages in thread From: Xie Xianshan @ 2013-09-10 7:25 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-ppc hi everyone, I`m getting the nobody cared disabling IRQ error, when i raised external interrupts IRQ3 to the Openpic in QEMU. (Actually, any external interrupts irq i raised can reproduce this error, but internal interrupts work fine) And this IRQ3 is sharing irq with usb card. I have tried to resolve this issue as follows, but nothing changed. 1)tried to boot with "irqpoll" option. 2)tried to stop raising the irq for usb card. 3)tried to boot with "kernel_irqchip" option Related log from dmesg: [ 2079.800787] irq 19: nobody cared (try booting with the "irqpoll" option) [ 2079.800891] Call Trace: [ 2079.801303] [d7ff3f40] [c0007780] show_stack+0x7c/0x1a0 (unreliable) [ 2079.801398] [d7ff3f80] [c007ad48] __report_bad_irq+0x5c/0xe0 [ 2079.801439] [d7ff3fa0] [c007af58] note_interrupt+0x18c/0x240 [ 2079.801466] [d7ff3fd0] [c007be04] handle_fasteoi_irq+0xf8/0x158 [ 2079.801492] [d7ff3ff0] [c000d9d4] call_handle_irq+0x18/0x28 [ 2079.801582] [d7ff5ec0] [c0004df0] do_IRQ+0xf0/0x16c [ 2079.801609] [d7ff5ee0] [c000e9bc] ret_from_except+0x0/0x18 [ 2079.801652] --- Exception: 501 at __do_softirq+0x94/0x18c [ 2079.801664] LR = __do_softirq+0x54/0x18c [ 2079.801698] [d7ff5ff0] [c000d9ac] call_do_softirq+0x14/0x24 [ 2079.801725] [d788fc50] [c0004bc0] do_softirq+0x74/0xa0 [ 2079.801751] [d788fc70] [c004350c] irq_exit+0x3c/0x8c [ 2079.801775] [d788fc80] [c0004e3c] do_IRQ+0x13c/0x16c [ 2079.801800] [d788fca0] [c000e9bc] ret_from_except+0x0/0x18 [ 2079.802566] --- Exception: 501 at bbc_dma_exec+0xa08/0xef4 [bbc_driver] [ 2079.802580] LR = bbc_dma_exec+0x970/0xef4 [bbc_driver] [ 2079.802620] [d788fdf0] [d94d4f28] bbc_ioctl_dma_read_write+0x2bc/0x464 [bbc_driver] [ 2079.802661] [d788fe70] [d94cae84] bbc_ioctl+0x2a0/0x36c [bbc_driver] [ 2079.802754] [d788feb0] [c00d1f04] do_vfs_ioctl+0x6b8/0x760 [ 2079.802782] [d788ff10] [c00d2014] sys_ioctl+0x68/0xa8 [ 2079.802807] [d788ff40] [c000e368] ret_from_syscall+0x0/0x3c [ 2079.802891] --- Exception: c01 at 0xfaffda8 [ 2079.802901] LR = 0xfb8ec20 [ 2079.802936] handlers: [ 2079.803034] [<c0268d70>] (usb_hcd_irq+0x0/0xac) [ 2079.803120] [<d94cc1bc>] (bbc_interrupt_handler+0x0/0x65c [bbc_driver]) [ 2079.803181] Disabling IRQ #19 And interrupt information from /proc/interrupts and stat: # cat /proc/interrupts CPU0 18: 6923 OpenPIC Level ohci_hcd:usb2, ohci_hcd:usb3, drvbbc_ldc 19: 100001 OpenPIC Level ehci_hcd:usb1, drvbbc 20: 0 OpenPIC Edge internal_error 21: 0 OpenPIC Level NMI 22: 0 OpenPIC Level SP_I2C_Handler 42: 1148 OpenPIC Level serial 43: 174 OpenPIC Level i2c-mpc, i2c-mpc 59: 0 OpenPIC Level fsl_espi 72: 51888 OpenPIC Level mmc0 LOC: 143330 Local timer interrupts SPU: 0 Spurious interrupts CNT: 0 Performance monitoring interrupts MCE: 0 Machine check exceptions #cat /proc/stat cpu 4929 0 5784 353692 736 0 460 0 0 0 cpu0 4929 0 5784 353692 736 0 460 0 0 0 intr 394342 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6929 100001 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1574 174 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 53202 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ctxt 357415 btime 1378108122 processes 1648 procs_running 1 procs_blocked 0 softirq 329977 0 154040 0 0 1145 0 17497 0 337 156958 I`ve no idea what the problem is and how to fix it. Do you have experience to this? Thanks in advance for any advice. Simen ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] Disabling IRQ error 2013-09-10 7:25 [Qemu-devel] Disabling IRQ error Xie Xianshan @ 2013-09-10 8:23 ` Max Filippov 2013-09-11 8:12 ` Xie Xianshan 0 siblings, 1 reply; 9+ messages in thread From: Max Filippov @ 2013-09-10 8:23 UTC (permalink / raw) To: Xie Xianshan; +Cc: qemu-ppc, qemu-devel On Tue, Sep 10, 2013 at 11:25 AM, Xie Xianshan <xiexs@cn.fujitsu.com> wrote: > hi everyone, > > I`m getting the nobody cared disabling IRQ error, when i raised external > interrupts IRQ3 to the Openpic in QEMU. > (Actually, any external interrupts irq i raised can reproduce this error, > but internal interrupts work fine) > > And this IRQ3 is sharing irq with usb card. Could you please explain what you mean by "I raised external interrupt", what you generally try to achieve and what behaviour you expected? Your description reminds me of this thread: https://lists.gnu.org/archive/html/qemu-devel/2013-08/msg04063.html -- Thanks. -- Max ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] Disabling IRQ error 2013-09-10 8:23 ` Max Filippov @ 2013-09-11 8:12 ` Xie Xianshan 2013-09-11 9:29 ` Max Filippov 0 siblings, 1 reply; 9+ messages in thread From: Xie Xianshan @ 2013-09-11 8:12 UTC (permalink / raw) To: Max Filippov; +Cc: qemu-ppc, qemu-devel Hi Max, Thanks for your reply. And I am sorry for my unclear description. I want to add a new device "fpga" for e500, and trigger an interrupt IRQ3 while the register BB_INTR_REG which belongs to device "fpga" is wrote by the device driver of "fpga". For e500, IRQ3 is an external interrupt irq. According the debug log, the disabling error is encoutered during writing BB_INTR_REG register. - write BB_INTR_REG register - qemu_irq_raise() is called. - after serval minutes, the error message about disabling irq is displayed. - continue the next execution without error(with poll?) My sample code is as follows: ---------------------------------------------- hw/ppce500_fpga.c ---------------------------------------------- typedef struct FPGAState { SysBusDevice busdev; MemoryRegion iomem; qemu_irq irq; }FPGAState; static void fpga_write(FPGAState *s, unsigned int offset, uint32_t value, unsigned size) { switch(offset) { case BB_INTR_REG: qemu_irq_raise(s->irq); break; } } static int ppce500_fpga_initfn(SysBusDevice *dev) { FPGAState *s; s = FROM_SYSBUS(FPGAState, SYS_BUS_DEVICE(dev)); sysbus_init_irq(dev, &s->irq); ... } ---------------------------------------------- hw/ppc/e500.c ---------------------------------------------- void ppce500_init(PPCE500Params *params) { ... qemu_irq *mpic; for (i = 0; i < 256; i++) { mpic[i] = qdev_get_gpio_in(dev, i); } ... /* add for FPGA */ dev_fpga = qdev_create(NULL, "fpga"); dev_fpga->id = "fpga"; qdev_init_nofail(dev_fpga); s = SYS_BUS_DEVICE(dev_fpga); memory_region_add_subregion(fpga_space, FPGA_REGS_OFFSET, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, mpic[3]); .... } Thanks Simen 于 2013/09/10 16:23, Max Filippov 写道: > On Tue, Sep 10, 2013 at 11:25 AM, Xie Xianshan<xiexs@cn.fujitsu.com> wrote: >> hi everyone, >> >> I`m getting the nobody cared disabling IRQ error, when i raised external >> interrupts IRQ3 to the Openpic in QEMU. >> (Actually, any external interrupts irq i raised can reproduce this error, >> but internal interrupts work fine) >> >> And this IRQ3 is sharing irq with usb card. > > Could you please explain what you mean by "I raised external interrupt", > what you generally try to achieve and what behaviour you expected? > > Your description reminds me of this thread: > https://lists.gnu.org/archive/html/qemu-devel/2013-08/msg04063.html > -- Best Regards Xie Xianshan -------------------------------------------------- Xie Xianshan Development Dept.I Nanjing Fujitsu Nanda Software Tech. Co., Ltd.(FNST) No. 6 Wenzhu Road, Nanjing, 210012, China PHONE: +86+25-86630566-9555 FUJITSU INTERNAL: 7998-9555 MAIL: xiexs@cn.fujitsu.com -------------------------------------------------- This communication is for use by the intended recipient(s) only and may contain information that is privileged, confidential and exempt from disclosure under applicable law. If you are not an intended recipient of this communication, you are hereby notified that any dissemination, distribution or copying hereof is strictly prohibited. If you have received this communication in error, please notify me by reply e-mail, permanently delete this communication from your system, and destroy any hard copies you may have printed ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] Disabling IRQ error 2013-09-11 8:12 ` Xie Xianshan @ 2013-09-11 9:29 ` Max Filippov 2013-09-12 7:49 ` Xie Xianshan 2013-10-23 2:38 ` Xie Xianshan 0 siblings, 2 replies; 9+ messages in thread From: Max Filippov @ 2013-09-11 9:29 UTC (permalink / raw) To: Xie Xianshan; +Cc: qemu-ppc, qemu-devel On Wed, Sep 11, 2013 at 12:12 PM, Xie Xianshan <xiexs@cn.fujitsu.com> wrote: > I want to add a new device "fpga" for e500, and trigger an interrupt IRQ3 > while the register BB_INTR_REG which belongs to device "fpga" is wrote by > the device driver of "fpga". > For e500, IRQ3 is an external interrupt irq. > According the debug log, the disabling error is encoutered during writing > BB_INTR_REG register. > - write BB_INTR_REG register > - qemu_irq_raise() is called. > - after serval minutes, > the error message about disabling irq is displayed. > - continue the next execution without error(with poll?) So your device raises IRQ, but it doesn't lower it. Real devices usually don't do that, they either generate a short pulse on the IRQ line (in case of edge-triggered IRQ) or raise IRQ line on some event and then lower it on a command from its driver (level-triggered IRQ). You can do the following to make your device behave that way: - make your fpga device capable of lowering its IRQ, e.g. by adding another register: > static void fpga_write(FPGAState *s, unsigned int offset, uint32_t value, > unsigned size) { > switch(offset) { > case BB_INTR_REG: > qemu_irq_raise(s->irq); > break; case BB_INTC_REG: qemu_irq_lower(s->irq); break; > } > } - provide an interrupt service routine in the linux driver for your fpga device that would check whether the interrupt was caused by its device, and if so lower the device's IRQ. Thanks. -- Max ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] Disabling IRQ error 2013-09-11 9:29 ` Max Filippov @ 2013-09-12 7:49 ` Xie Xianshan 2013-09-12 7:59 ` Max Filippov 2013-10-23 2:38 ` Xie Xianshan 1 sibling, 1 reply; 9+ messages in thread From: Xie Xianshan @ 2013-09-12 7:49 UTC (permalink / raw) To: Max Filippov; +Cc: qemu-ppc, qemu-devel Hi Max, Thanks for your patience and help. I`ve tried to do what you said, but the problem doesn`t go away. And actually i cannot add a new register to the fpga device, because the fpga device i`m emulating already exists in the real world. So i cannot change anything about hardware properties and linux driver for this device. By the way, how did you finally fix your problem? Thanks, Simen 于 2013/09/11 17:29, Max Filippov 写道: > On Wed, Sep 11, 2013 at 12:12 PM, Xie Xianshan<xiexs@cn.fujitsu.com> wrote: >> I want to add a new device "fpga" for e500, and trigger an interrupt IRQ3 >> while the register BB_INTR_REG which belongs to device "fpga" is wrote by >> the device driver of "fpga". >> For e500, IRQ3 is an external interrupt irq. >> According the debug log, the disabling error is encoutered during writing >> BB_INTR_REG register. >> - write BB_INTR_REG register >> - qemu_irq_raise() is called. >> - after serval minutes, >> the error message about disabling irq is displayed. >> - continue the next execution without error(with poll?) > > So your device raises IRQ, but it doesn't lower it. Real devices > usually don't do that, they either generate a short pulse on the > IRQ line (in case of edge-triggered IRQ) or raise IRQ line on > some event and then lower it on a command from its driver > (level-triggered IRQ). > > You can do the following to make your device behave that way: > - make your fpga device capable of lowering its IRQ, e.g. by adding > another register: > >> static void fpga_write(FPGAState *s, unsigned int offset, uint32_t value, >> unsigned size) { >> switch(offset) { >> case BB_INTR_REG: >> qemu_irq_raise(s->irq); >> break; > case BB_INTC_REG: > qemu_irq_lower(s->irq); > break; >> } >> } > > - provide an interrupt service routine in the linux driver for your fpga > device that would check whether the interrupt was caused by its > device, and if so lower the device's IRQ. > > Thanks. > -- Max > > -- Best Regards Xie Xianshan -------------------------------------------------- Xie Xianshan Development Dept.I Nanjing Fujitsu Nanda Software Tech. Co., Ltd.(FNST) No. 6 Wenzhu Road, Nanjing, 210012, China PHONE: +86+25-86630566-9555 FUJITSU INTERNAL: 7998-9555 MAIL: xiexs@cn.fujitsu.com -------------------------------------------------- This communication is for use by the intended recipient(s) only and may contain information that is privileged, confidential and exempt from disclosure under applicable law. If you are not an intended recipient of this communication, you are hereby notified that any dissemination, distribution or copying hereof is strictly prohibited. If you have received this communication in error, please notify me by reply e-mail, permanently delete this communication from your system, and destroy any hard copies you may have printed ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] Disabling IRQ error 2013-09-12 7:49 ` Xie Xianshan @ 2013-09-12 7:59 ` Max Filippov 2013-09-12 10:51 ` Xie Xianshan 0 siblings, 1 reply; 9+ messages in thread From: Max Filippov @ 2013-09-12 7:59 UTC (permalink / raw) To: Xie Xianshan; +Cc: qemu-ppc, qemu-devel On Thu, Sep 12, 2013 at 11:49 AM, Xie Xianshan <xiexs@cn.fujitsu.com> wrote: > Hi Max, > Thanks for your patience and help. > I`ve tried to do what you said, but the problem doesn`t go away. > And actually i cannot add a new register to the fpga device, because the > fpga device i`m emulating already exists in the real world. > So i cannot change anything about hardware properties and linux driver for > this device. Then I don't get its IRQ logic. Does it mean an IRQ to be edge-triggered? Its model should use qemu_irq_pulse then instead of qemu_irq_raise and its IRQ line should be connected to edge-sensing input of interrupt controller. Input that you have used is also used to sense PCI IRQ and is level-sensing. > By the way, how did you finally fix your problem? I didn't have any. (: -- Thanks. -- Max ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] Disabling IRQ error 2013-09-12 7:59 ` Max Filippov @ 2013-09-12 10:51 ` Xie Xianshan 2013-09-12 11:10 ` Max Filippov 0 siblings, 1 reply; 9+ messages in thread From: Xie Xianshan @ 2013-09-12 10:51 UTC (permalink / raw) To: Max Filippov; +Cc: qemu-ppc, qemu-devel Dear Max, > Does it mean an IRQ to be edge-triggered? No, it is a level-sensitive and active-high interrupt. This is why i tried to use qemu_irq_raise() to trigger IRQ. Thanks, Simen >> Hi Max, >> Thanks for your patience and help. >> I`ve tried to do what you said, but the problem doesn`t go away. >> And actually i cannot add a new register to the fpga device, because the >> fpga device i`m emulating already exists in the real world. >> So i cannot change anything about hardware properties and linux driver for >> this device. > > Then I don't get its IRQ logic. Does it mean an IRQ to be edge-triggered? > Its model should use qemu_irq_pulse then instead of qemu_irq_raise and > its IRQ line should be connected to edge-sensing input of interrupt controller. > Input that you have used is also used to sense PCI IRQ and is level-sensing. > >> By the way, how did you finally fix your problem? > > I didn't have any. (: > ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] Disabling IRQ error 2013-09-12 10:51 ` Xie Xianshan @ 2013-09-12 11:10 ` Max Filippov 0 siblings, 0 replies; 9+ messages in thread From: Max Filippov @ 2013-09-12 11:10 UTC (permalink / raw) To: Xie Xianshan; +Cc: qemu-ppc, qemu-devel On Thu, Sep 12, 2013 at 2:51 PM, Xie Xianshan <xiexs@cn.fujitsu.com> wrote: > Dear Max, > > > Does it mean an IRQ to be edge-triggered? > No, it is a level-sensitive and active-high interrupt. > This is why i tried to use qemu_irq_raise() to trigger IRQ. Ok, back to your original question: > I`m getting the nobody cared disabling IRQ error, when i raised external interrupts IRQ3 to the Openpic in QEMU. Your linux driver should return anything except IRQ_NONE from its ISR when it detects IRQ from your device. As I understand once you raise IRQ you don't lower it, so the driver must always return anything except IRQ_NONE. If it doesn't do so you will see the error message above. -- Thanks. -- Max ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] Disabling IRQ error 2013-09-11 9:29 ` Max Filippov 2013-09-12 7:49 ` Xie Xianshan @ 2013-10-23 2:38 ` Xie Xianshan 1 sibling, 0 replies; 9+ messages in thread From: Xie Xianshan @ 2013-10-23 2:38 UTC (permalink / raw) To: qemu-devel, Max Filippov Dear Max, Sorry for the late reply. Thanks for your advice about lowering the irqs after raising them, and that fixed my problem. Thanks again for your kindness. Thanks, Simen 于 2013/09/11 17:29, Max Filippov 写道: > On Wed, Sep 11, 2013 at 12:12 PM, Xie Xianshan<xiexs@cn.fujitsu.com> wrote: >> I want to add a new device "fpga" for e500, and trigger an interrupt IRQ3 >> while the register BB_INTR_REG which belongs to device "fpga" is wrote by >> the device driver of "fpga". >> For e500, IRQ3 is an external interrupt irq. >> According the debug log, the disabling error is encoutered during writing >> BB_INTR_REG register. >> - write BB_INTR_REG register >> - qemu_irq_raise() is called. >> - after serval minutes, >> the error message about disabling irq is displayed. >> - continue the next execution without error(with poll?) > > So your device raises IRQ, but it doesn't lower it. Real devices > usually don't do that, they either generate a short pulse on the > IRQ line (in case of edge-triggered IRQ) or raise IRQ line on > some event and then lower it on a command from its driver > (level-triggered IRQ). > > You can do the following to make your device behave that way: > - make your fpga device capable of lowering its IRQ, e.g. by adding > another register: > >> static void fpga_write(FPGAState *s, unsigned int offset, uint32_t value, >> unsigned size) { >> switch(offset) { >> case BB_INTR_REG: >> qemu_irq_raise(s->irq); >> break; > case BB_INTC_REG: > qemu_irq_lower(s->irq); > break; >> } >> } > > - provide an interrupt service routine in the linux driver for your fpga > device that would check whether the interrupt was caused by its > device, and if so lower the device's IRQ. > > Thanks. > -- Max > > > ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2013-10-23 2:38 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-09-10 7:25 [Qemu-devel] Disabling IRQ error Xie Xianshan 2013-09-10 8:23 ` Max Filippov 2013-09-11 8:12 ` Xie Xianshan 2013-09-11 9:29 ` Max Filippov 2013-09-12 7:49 ` Xie Xianshan 2013-09-12 7:59 ` Max Filippov 2013-09-12 10:51 ` Xie Xianshan 2013-09-12 11:10 ` Max Filippov 2013-10-23 2:38 ` Xie Xianshan
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