From: Sebastian Huber <sebastian.huber@embedded-brains.de>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v1 4/4] target-arm: Add CP15 VBAR support
Date: Mon, 16 Sep 2013 17:34:51 +0200 [thread overview]
Message-ID: <5237251B.1090801@embedded-brains.de> (raw)
In-Reply-To: <8549a20530b9331af1c3d725f4cb9a3e4fe3a9b2.1373429432.git.peter.crosthwaite@xilinx.com>
Hello,
it would be really nice to get the CP15 VBAR support integrated. This allows
unit test suites of single address space real-time systems to catch NULL
pointer read/write access for example.
The ARM documentation says that this is a banked register that is only present
in an implementation that includes the Security Extensions. Is this equivalent
to having TrustZone?
In the ID_PFR1, Processor Feature Register 1, the bits [4:7] indicate if a
particular CPU has this feature. Is it possible to use this register to
determine the availability of the VBAR register in Qemu? This may avoid adding
a new enum arm_features.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.huber@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
next prev parent reply other threads:[~2013-09-16 16:13 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-10 4:21 [Qemu-devel] [PATCH v1 0/4] Petercs target-arm queue peter.crosthwaite
2013-07-10 4:21 ` [Qemu-devel] [PATCH v1 1/4] target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup peter.crosthwaite
2013-07-10 4:22 ` [Qemu-devel] [PATCH v1 2/4] target-arm/helper.c: Implement MIDR aliases peter.crosthwaite
2013-07-10 4:22 ` [Qemu-devel] [PATCH v1 3/4] target-arm/helper.c: Allow const opaques in arm CP peter.crosthwaite
2013-07-10 7:32 ` Peter Maydell
2013-07-10 7:35 ` Peter Crosthwaite
2013-07-10 4:23 ` [Qemu-devel] [PATCH v1 4/4] target-arm: Add CP15 VBAR support peter.crosthwaite
2013-07-10 7:38 ` Peter Maydell
2013-07-15 3:31 ` Peter Crosthwaite
2013-09-16 15:34 ` Sebastian Huber [this message]
2013-09-17 8:37 ` Peter Maydell
2013-09-17 11:29 ` Sebastian Huber
2013-09-17 7:43 ` Sebastian Huber
2013-10-17 10:38 ` Peter Maydell
2013-10-18 14:05 ` Peter Maydell
2013-10-18 22:10 ` Peter Crosthwaite
2013-10-18 23:38 ` Roy Franz
2013-10-19 9:03 ` Peter Maydell
2013-07-15 14:35 ` [Qemu-devel] [PATCH v1 0/4] Petercs target-arm queue Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5237251B.1090801@embedded-brains.de \
--to=sebastian.huber@embedded-brains.de \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).