From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39523) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VMclK-0006Ry-05 for qemu-devel@nongnu.org; Thu, 19 Sep 2013 07:51:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VMclC-0000ys-Mt for qemu-devel@nongnu.org; Thu, 19 Sep 2013 07:51:09 -0400 Received: from cantor2.suse.de ([195.135.220.15]:52214 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VMclC-0000yk-DE for qemu-devel@nongnu.org; Thu, 19 Sep 2013 07:51:02 -0400 Message-ID: <523AE522.4080102@suse.de> Date: Thu, 19 Sep 2013 13:50:58 +0200 From: =?ISO-8859-1?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <20130918203902.GC10924@otherpad.lan.raisama.net> In-Reply-To: <20130918203902.GC10924@otherpad.lan.raisama.net> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC] Enabling x2apic on most (all?) x86 CPU models List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: Igor Mammedov , Bandan Das , qemu-devel@nongnu.org, Gleb Natapov Hi, Am 18.09.2013 22:39, schrieb Eduardo Habkost: > Hi, >=20 > I would like to get your opinion on this: >=20 > Currently we have x2apic enabled only on SandyBridge and Haswell CPU > models because we try to keep the CPU models closer to real CPUs. > However, x2apic improves performance by reducing the overhead of APIC > accesses, and KVM can emulate it independently of host CPU support for > x2apic. This feature is present on KVM for 4 years, already (since > v2.6.32). There's no reason for people to not have x2apic enabled when > running KVM. >=20 > So, my question is: should we break the "try to be close to real CPUs" > rule and enable x2apic by default on most (or all) CPU models? I believ= e > it is a reasonable thing to do. I disagree, since this would also affect TCG. I would prefer to add x2apic only to models that really have it and would be open to generally enabling it for kvm_enabled() in instance_init/registration (so that users can disable it via ,-x2apic or soon QMP). As always, software might make weird assumptions about effects of a present CPUID bit, but I trust you'll do some more testing before submitting a non-RFC patch. :) Regards, Andreas >=20 > Also: if we do it, should we do it for all CPU models on > target-i386/cpu.c, or just a subset of them? (maybe the more recent > ones?) >=20 > (The patch below touches only Conroe, Penryn, Nehalem, and Westmere, an= d > it lacks machine-type compatibility code. But I am planning to submit a > patch that changes all CPU models to include x2apic by default.) >=20 > --- > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 9abb73f..f76c34b 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -791,7 +791,7 @@ static x86_def_t builtin_x86_defs[] =3D { > CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE= | > CPUID_DE | CPUID_FP87, > .features[FEAT_1_ECX] =3D > - CPUID_EXT_SSSE3 | CPUID_EXT_SSE3, > + CPUID_EXT_SSSE3 | CPUID_EXT_SSE3 | CPUID_EXT_X2APIC, > .features[FEAT_8000_0001_EDX] =3D > CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, > .features[FEAT_8000_0001_ECX] =3D > @@ -814,7 +814,7 @@ static x86_def_t builtin_x86_defs[] =3D { > CPUID_DE | CPUID_FP87, > .features[FEAT_1_ECX] =3D > CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | > - CPUID_EXT_SSE3, > + CPUID_EXT_SSE3 | CPUID_EXT_X2APIC, > .features[FEAT_8000_0001_EDX] =3D > CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, > .features[FEAT_8000_0001_ECX] =3D > @@ -837,7 +837,8 @@ static x86_def_t builtin_x86_defs[] =3D { > CPUID_DE | CPUID_FP87, > .features[FEAT_1_ECX] =3D > CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 | > - CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE3, > + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE3 | > + CPUID_EXT_X2APIC, > .features[FEAT_8000_0001_EDX] =3D > CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, > .features[FEAT_8000_0001_ECX] =3D > @@ -861,7 +862,7 @@ static x86_def_t builtin_x86_defs[] =3D { > .features[FEAT_1_ECX] =3D > CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | > CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | > - CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3, > + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | CPUID_EXT_X2APIC, > .features[FEAT_8000_0001_EDX] =3D > CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, > .features[FEAT_8000_0001_ECX] =3D >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg