From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51630) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VPdyo-0007qK-4j for qemu-devel@nongnu.org; Fri, 27 Sep 2013 15:45:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VPdyf-0007na-Om for qemu-devel@nongnu.org; Fri, 27 Sep 2013 15:45:34 -0400 Received: from mail-ye0-x232.google.com ([2607:f8b0:4002:c04::232]:51514) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VPdyf-0007nU-K9 for qemu-devel@nongnu.org; Fri, 27 Sep 2013 15:45:25 -0400 Received: by mail-ye0-f178.google.com with SMTP id m5so1003665yen.37 for ; Fri, 27 Sep 2013 12:45:25 -0700 (PDT) Sender: Richard Henderson Message-ID: <5245E050.8010408@twiddle.net> Date: Fri, 27 Sep 2013 12:45:20 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1380242934-20953-1-git-send-email-agraf@suse.de> <1380242934-20953-31-git-send-email-agraf@suse.de> In-Reply-To: <1380242934-20953-31-git-send-email-agraf@suse.de> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 30/60] AArch64: Add extr instruction emulation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Peter Maydell , Michael Matz , qemu-devel@nongnu.org, C Fontana , Dirk Mueller , Laurent Desnogues , Christoffer Dall On 09/26/2013 05:48 PM, Alexander Graf wrote: > + if (is_32bit) { > + tcg_gen_ext32u_i64(tcg_tmp, cpu_reg(rm)); > + } else { > + tcg_gen_mov_i64(tcg_tmp, cpu_reg(rm)); > + } > + tcg_gen_shri_i64(tcg_res, cpu_reg(rm), imms); > + tcg_gen_shli_i64(tcg_tmp, cpu_reg(rn), bitsize - imms); > + tcg_gen_or_i64(cpu_reg(rd), tcg_tmp, tcg_res); The first ext/mov is incorrectly unused. This will produce incorrect results for is_32bit. r~