From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44535) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VR6nL-0002JA-4o for qemu-devel@nongnu.org; Tue, 01 Oct 2013 16:43:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VR6nD-00088n-PD for qemu-devel@nongnu.org; Tue, 01 Oct 2013 16:43:47 -0400 Received: from v220110690675601.yourvserver.net ([37.221.199.173]:43972) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VR6nD-00088h-Iz for qemu-devel@nongnu.org; Tue, 01 Oct 2013 16:43:39 -0400 Message-ID: <524B33F6.8060904@weilnetz.de> Date: Tue, 01 Oct 2013 22:43:34 +0200 From: Stefan Weil MIME-Version: 1.0 References: <20130930150918.29090.41471.malonedeb@gac.canonical.com> <20131001181451.12751.73694.malone@chaenomeles.canonical.com> In-Reply-To: <20131001181451.12751.73694.malone@chaenomeles.canonical.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [Bug 1233225] Re: mips/mipsel linux user float division problem List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno , Richard Henderson Cc: Bug 1233225 <1233225@bugs.launchpad.net>, qemu-devel@nongnu.org Am 01.10.2013 20:14, schrieb Stefan Weil: > Here is the related commit found by git bisect: > > $ git bisect bad > 68473f15d4c9948986618f63828825beafcaf1cf is the first bad commit > commit 68473f15d4c9948986618f63828825beafcaf1cf > Author: Richard Henderson > Date: Sun Feb 10 10:30:46 2013 -0800 > > mips64-linux-user: Enable 64-bit address mode and fpu > > Signed-off-by: Richard Henderson > Signed-off-by: Aurelien Jarno > > :040000 040000 de3caa25e43aaeb7d992715b2efc6804a7d0d633 > b007b2a9809547197952ca4d36fbd29f89aab470 M target-mips > Hi Aurelien, hi Richard, the following patch is a workaround which fixes the reported problem (see https://bugs.launchpad.net/qemu/+bug/1233225): diff --git a/target-mips/translate.c b/target-mips/translate.c index ad43d59..475b0f6 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -15990,7 +15990,7 @@ void cpu_state_reset(CPUMIPSState *env) } /* Enable 64-bit FPU if the target cpu supports it. */ if (env->active_fpu.fcr0 & (1 << FCR0_F64)) { - env->CP0_Status |= (1 << CP0St_FR); + // env->CP0_Status |= (1 << CP0St_FR); } #else if (env->hflags & MIPS_HFLAG_BMASK) { Of course it's not the correct solution. I won't be able to look more into this issue the next days, but maybe you already have a bug fix. Regards, Stefan