From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56758) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VREjd-0002Hu-Do for qemu-devel@nongnu.org; Wed, 02 Oct 2013 01:12:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VREjX-0004LD-LP for qemu-devel@nongnu.org; Wed, 02 Oct 2013 01:12:29 -0400 Received: from www11.your-server.de ([213.133.104.11]:43173) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VREjX-0004Kk-Et for qemu-devel@nongnu.org; Wed, 02 Oct 2013 01:12:23 -0400 Message-ID: <524BAB2A.4050202@macke.de> Date: Tue, 01 Oct 2013 22:12:10 -0700 From: Sebastian Macke MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------080608000809090608040906" Subject: [Qemu-devel] [PATCH] Correction of the TLB handling of the OpenRISC target List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: openrisc@lists.openrisc.net, openrisc@lists.opencores.org This is a multi-part message in MIME format. --------------080608000809090608040906 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Hi, this patch corrects two problems for the OpenRISC Target in QEMU. The first one corrects one obvious bug concerning the handling of page faults while reading from a page. The second part removes a non-conforming behavior for the first page of the memory. I have tested this patch with the newest Linux kernel and compared the output with or1ksim. Sebastian --------------080608000809090608040906 Content-Type: text/plain; charset=windows-1252; name="0001-Correction-of-the-TLB-handling-of-the-OpenRISC-targe.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename*0="0001-Correction-of-the-TLB-handling-of-the-OpenRISC-targe.pa"; filename*1="tch" >>From 4491bae7109e2b4de5a8de8a7e4b08d1f19ac70e Mon Sep 17 00:00:00 2001 From: Sebastian Macke Date: Tue, 1 Oct 2013 21:39:38 -0700 Subject: [PATCH] Correction of the TLB handling of the OpenRISC target This patch correct two problems. The first one corrects one obvious bug concerning the handling of page faults while reading from a page. The second part removes a non-conforming behavior for the first page of the memory. I have tested this patch with the newest Linux kernel and compared the output with or1ksim. Signed-off-by: Sebastian Macke --- target-openrisc/mmu.c | 9 +-------- 1 files changed, 1 insertions(+), 8 deletions(-) diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c index 57f5616..22d7cbe 100644 --- a/target-openrisc/mmu.c +++ b/target-openrisc/mmu.c @@ -102,7 +102,7 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu, } } - if ((rw & 0) && ((right & PAGE_READ) == 0)) { + if (!(rw & 1) && ((right & PAGE_READ) == 0)) { return TLBRET_BADADDR; } if ((rw & 1) && ((right & PAGE_WRITE) == 0)) { @@ -122,13 +122,6 @@ static int cpu_openrisc_get_phys_addr(OpenRISCCPU *cpu, { int ret = TLBRET_MATCH; - /* [0x0000--0x2000]: unmapped */ - if (address < 0x2000 && (cpu->env.sr & SR_SM)) { - *physical = address; - *prot = PAGE_READ | PAGE_WRITE; - return ret; - } - if (rw == 2) { /* ITLB */ *physical = 0; ret = cpu->env.tlb->cpu_openrisc_map_address_code(cpu, physical, -- 1.7.9 --------------080608000809090608040906--