From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35247) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VRIB1-0007A5-TJ for qemu-devel@nongnu.org; Wed, 02 Oct 2013 04:53:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VRIAt-0001NB-CL for qemu-devel@nongnu.org; Wed, 02 Oct 2013 04:52:59 -0400 Received: from mail-ee0-x22b.google.com ([2a00:1450:4013:c00::22b]:39439) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VRIAt-0001N7-4z for qemu-devel@nongnu.org; Wed, 02 Oct 2013 04:52:51 -0400 Received: by mail-ee0-f43.google.com with SMTP id e52so229067eek.2 for ; Wed, 02 Oct 2013 01:52:50 -0700 (PDT) Sender: Paolo Bonzini Message-ID: <524BDEF3.9090102@redhat.com> Date: Wed, 02 Oct 2013 10:53:07 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <524162DE.1080705@redhat.com> <20130925070116.GA5436@redhat.com> <1380098908.1968.30.camel@localhost.localdomain> <20130925085928.GA6175@redhat.com> In-Reply-To: <20130925085928.GA6175@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] Attaching PCI devices to the PCIe root complex List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: libvir-list@redhat.com, qemu list , Laine Stump , marcel.a@redhat.com Il 25/09/2013 10:59, Michael S. Tsirkin ha scritto: >> > I couldn't find on PCIe spec any mention that "Root Complex Integrated EndPoint" >> > must be PCIe. But, from spec 1.3.2.3: >> > - A Root Complex Integrated Endpoint must not require I/O resources claimed through BAR(s). >> > - A Root Complex Integrated Endpoint must not generate I/O Requests. >> > - A Root Complex Integrated Endpoint is required to support MSI or MSI-X or both if an >> > interrupt resource is requested. > Heh PCI-SIG keeps fighting against legacy interrupts and IO. > But lots of hardware happily ignores these rules. > And the reason is simple: software does not enforce them. I think it's "must not require", not "must not have". So it's the usual rule that applies to PCIe device, i.e. that they should work even if the OS doesn't enable the I/O BARs. Then I have no idea what the I/O BAR in i915 is for, and whether the device can be used without that BAR. Paolo