From: Richard Henderson <rth@twiddle.net>
To: Will Newton <will.newton@linaro.org>
Cc: qemu-devel@nongnu.org, patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH v2] target-arm: Implement ARMv8 VSEL instruction.
Date: Thu, 03 Oct 2013 07:34:37 -0700 [thread overview]
Message-ID: <524D807D.4070205@twiddle.net> (raw)
In-Reply-To: <524D6838.5080607@linaro.org>
On 10/03/2013 05:51 AM, Will Newton wrote:
> + case 0: /* eq: Z */
> + tcg_gen_movcond_i64(TCG_COND_EQ, ftmp3, cpu_ZF, zero,
> + ftmp1, ftmp2);
> + break;
Does this compile when configured with --enable-debug?
It shouldn't, since movcond_i64 takes 5 _i64 variables,
and your comparison variables are _i32.
r~
next prev parent reply other threads:[~2013-10-03 14:41 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-03 12:51 [Qemu-devel] [PATCH v2] target-arm: Implement ARMv8 VSEL instruction Will Newton
2013-10-03 12:59 ` Peter Maydell
2013-10-03 14:31 ` Will Newton
2013-10-03 14:37 ` Peter Maydell
2013-10-15 10:31 ` Peter Maydell
2013-10-03 14:34 ` Richard Henderson [this message]
2013-10-03 15:10 ` Will Newton
2013-10-03 15:28 ` Richard Henderson
2013-10-03 18:39 ` Richard Henderson
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