From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41912) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VSs6d-00075i-3D for qemu-devel@nongnu.org; Sun, 06 Oct 2013 13:27:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VSs6V-0008OY-Py for qemu-devel@nongnu.org; Sun, 06 Oct 2013 13:26:59 -0400 Received: from cantor2.suse.de ([195.135.220.15]:44485 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VSs6V-0008OG-II for qemu-devel@nongnu.org; Sun, 06 Oct 2013 13:26:51 -0400 Message-ID: <52519D54.4070102@suse.de> Date: Sun, 06 Oct 2013 19:26:44 +0200 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] Update the id of Vexpress Cortex-A9 from r0p0 to r0p1? List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Mian Yousaf Kaukab , QEMU Developers Am 06.10.2013 14:10, schrieb Peter Maydell: > The major thing we need is a mechanism for allowing at least the > board, and possibly also the user, to specify properties of the cpu > like "which rev/patchlevel is it" I believe I posted patches for that long ago, to clean up the PXA mess a little... probably need to be rebased by now. Andreas > (being able to specify "do we have an > fpu/neon/etc" is a similar thing). >=20 > If we had that it would not be too hard to then have the vexpress-a9 > board specify which rev/patchlevel to use. But we don't have the > mechanism currently. --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg