From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45861) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VUCcS-0003AT-Sd for qemu-devel@nongnu.org; Thu, 10 Oct 2013 05:33:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VUCcM-0002aQ-5a for qemu-devel@nongnu.org; Thu, 10 Oct 2013 05:33:20 -0400 Received: from mx1.redhat.com ([209.132.183.28]:29533) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VUCcL-0002aA-TU for qemu-devel@nongnu.org; Thu, 10 Oct 2013 05:33:14 -0400 Message-ID: <52567453.50204@redhat.com> Date: Thu, 10 Oct 2013 11:33:07 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1381391779-27718-1-git-send-email-pingfank@linux.vnet.ibm.com> <1381391779-27718-3-git-send-email-pingfank@linux.vnet.ibm.com> <20131010091614.GA7089@redhat.com> In-Reply-To: <20131010091614.GA7089@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v6 2/5] hpet: enable to entitle more irq pins for hpet List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Liu Ping Fan , Anthony Liguori , qemu-devel@nongnu.org Il 10/10/2013 11:16, Michael S. Tsirkin ha scritto: > On Thu, Oct 10, 2013 at 03:56:16PM +0800, Liu Ping Fan wrote: >> On q35, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23 >> of ioapic can be dynamically assigned to hpet as guest chooses. >> So we introduce intcap property to do that. (currently, its value >> is IRQ2. Later, it should be set by board.) >> >> Signed-off-by: Liu Ping Fan >> --- >> hw/timer/hpet.c | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) >> >> diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c >> index 8429eb3..5b11be4 100644 >> --- a/hw/timer/hpet.c >> +++ b/hw/timer/hpet.c >> @@ -25,6 +25,7 @@ >> */ >> >> #include "hw/hw.h" >> +#include "hw/boards.h" >> #include "hw/i386/pc.h" >> #include "ui/console.h" >> #include "qemu/timer.h" >> @@ -42,6 +43,9 @@ >> >> #define HPET_MSI_SUPPORT 0 >> >> +/* Will fix: intcap is set by board, and should be 0 if nobody sets. */ >> +#define HPET_TN_INT_CAP_DEFAULT 0x4ULL >> + >> #define TYPE_HPET "hpet" >> #define HPET(obj) OBJECT_CHECK(HPETState, (obj), TYPE_HPET) >> >> @@ -73,6 +77,7 @@ typedef struct HPETState { >> uint8_t rtc_irq_level; >> qemu_irq pit_enabled; >> uint8_t num_timers; >> + uint32_t intcap; >> HPETTimer timer[HPET_MAX_TIMERS]; >> >> /* Memory-mapped, software visible registers */ >> @@ -663,8 +668,8 @@ static void hpet_reset(DeviceState *d) >> if (s->flags & (1 << HPET_MSI_SUPPORT)) { >> timer->config |= HPET_TN_FSB_CAP; >> } >> - /* advertise availability of ioapic inti2 */ >> - timer->config |= 0x00000004ULL << 32; >> + /* advertise availability of ioapic int */ >> + timer->config |= (uint64_t)s->intcap << 32; >> timer->period = 0ULL; >> timer->wrap_flag = 0; >> } >> @@ -753,6 +758,7 @@ static void hpet_realize(DeviceState *dev, Error **errp) >> static Property hpet_device_properties[] = { >> DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS), >> DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false), >> + DEFINE_PROP_UINT32("intcap", HPETState, intcap, HPET_TN_INT_CAP_DEFAULT), >> DEFINE_PROP_END_OF_LIST(), >> }; > > Please add a macro for this name as you use it in other > files later. Are you sure? This is not done for any other compat property. Paolo