From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44807) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VW6FU-0000Eu-TB for qemu-devel@nongnu.org; Tue, 15 Oct 2013 11:09:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VW6FP-0006wC-2W for qemu-devel@nongnu.org; Tue, 15 Oct 2013 11:09:28 -0400 Received: from mail-ee0-f54.google.com ([74.125.83.54]:61096) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VW6FO-0006w4-SG for qemu-devel@nongnu.org; Tue, 15 Oct 2013 11:09:22 -0400 Received: by mail-ee0-f54.google.com with SMTP id e53so4113561eek.27 for ; Tue, 15 Oct 2013 08:09:21 -0700 (PDT) Message-ID: <525D5A9F.9030003@linaro.org> Date: Tue, 15 Oct 2013 16:09:19 +0100 From: Will Newton MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH v5 1/2] target-arm: Move call to disas_vfp_insn out of disas_coproc_insn. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Patch Tracking Floating point is an extension to the instruction set rather than a coprocessor, so call it directly from the ARM and Thumb decode functions. Signed-off-by: Will Newton --- target-arm/translate.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) Changes in v5: - Check for high bits set in disas_vfp_insn diff --git a/target-arm/translate.c b/target-arm/translate.c index 5f003e7..c04d2cf 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -2636,6 +2636,13 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) && rn != ARM_VFP_MVFR1 && rn != ARM_VFP_MVFR0) return 1; } + + if (extract32(insn, 28, 4) == 0xf) { + /* Encodings with T=1 (Thumb) or unconditional (ARM): + only used in v8 and above. */ + return 1; + } + dp = ((insn & 0xf00) == 0xb00); switch ((insn >> 24) & 0xf) { case 0xe: @@ -6296,9 +6303,6 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) return disas_dsp_insn(env, s, insn); } return 1; - case 10: - case 11: - return disas_vfp_insn (env, s, insn); default: break; } @@ -6753,6 +6757,11 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s) goto illegal_op; return; } + if ((insn & 0x0f000e10) == 0x0e000a00) { + /* VFP. */ + if (disas_vfp_insn(env, s, insn)) + goto illegal_op; + } if (((insn & 0x0f30f000) == 0x0510f000) || ((insn & 0x0f30f010) == 0x0710f000)) { if ((insn & (1 << 22)) == 0) { @@ -8033,9 +8042,15 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s) case 0xc: case 0xd: case 0xe: - /* Coprocessor. */ - if (disas_coproc_insn(env, s, insn)) + if (((insn >> 8) & 0xe) == 10) { + /* VFP. */ + if (disas_vfp_insn(env, s, insn)) { + goto illegal_op; + } + } else if (disas_coproc_insn(env, s, insn)) { + /* Coprocessor. */ goto illegal_op; + } break; case 0xf: /* swi */ @@ -8765,6 +8780,10 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw insn = (insn & 0xe2ffffff) | ((insn & (1 << 28)) >> 4) | (1 << 28); if (disas_neon_data_insn(env, s, insn)) goto illegal_op; + } else if (((insn >> 8) & 0xe) == 10) { + if (disas_vfp_insn(env, s, insn)) { + goto illegal_op; + } } else { if (insn & (1 << 28)) goto illegal_op; -- 1.8.1.4