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From: Sebastian Macke <sebastian@macke.de>
To: Jia Liu <proljc@gmail.com>
Cc: openrisc <openrisc@lists.openrisc.net>,
	"openrisc@lists.opencores.org" <openrisc@lists.opencores.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH_v2 0/9] target-openrisc: Corrections and speed improvements
Date: Thu, 24 Oct 2013 16:23:46 -0700	[thread overview]
Message-ID: <5269AC02.4060500@macke.de> (raw)
In-Reply-To: <CAJBMM-u8AAb7_+faSenhekFuM-t2ygv_LxAcALB1YRcnW6D3KQ@mail.gmail.com>

On 22/10/2013 8:47 PM, Jia Liu wrote:
> Hi Sebastian,
>
> On Tue, Oct 22, 2013 at 8:12 AM, Sebastian Macke <sebastian@macke.de> wrote:
>> This series is the first part to make the OpenRISC target more
>> reliable and faster.
>> It corrects several severe problems which prevented the OpenRISC emulation
>> for being useful in the past.
>>
>> The patchset was tested with
>>    - the tests/tcg/openrisc tests
>>    - booting Linux 3.11
>>    - run configure + make + gcc of a simple terminal graphic demo called cmatrix
>>    - run benchmark tool nbench in qemu-user mode and in the softmmu mode
>>
>> The speed improvement is less than 10% because the overhead is still to high
>> as the openrisc target does not support translation block chaining.
>> This will be included in one of the future patches.
>>
>> Only the patch which removes the npc and ppc variables removes a little feature
>> from the OpenRISC target but which does not break the specification and will lead to
>> a significant speed improvement.
> For v2 0/9 - 9/9
> Acked-by: Jia Liu <proljc@gmail.com>
>
> I'll add some comment into the code to explain why we separate flags from sr
> and send a pull request if nobody raise a rejection.

Ok great, the next bunch of patches is already in development.

>>
>> Sebastian Macke (9):
>>    target-openrisc: Speed up move instruction
>>    target-openrisc: Remove unnecessary code generated by jump
>>      instructions
>>    target-openrisc: Remove executable flag for every page
>>    target-openrisc: Correct wrong epcr register in interrupt handler
>>    openrisc-timer: Reduce overhead, Separate clock update functions
>>    target-openrisc: Correct memory bounds checking for the tlb buffers
>>    target-openrisc: Separate branch flag from Supervision register
>>    target-openrisc: Complete remove of npc and ppc variables
>>    target-openrisc: Correct carry flag check of l.addc and l.addic test
>>      cases
>>
>>   hw/openrisc/cputimer.c             |  29 ++++--
>>   target-openrisc/cpu.c              |   1 +
>>   target-openrisc/cpu.h              |  16 ++-
>>   target-openrisc/gdbstub.c          |  20 +---
>>   target-openrisc/interrupt.c        |  27 ++---
>>   target-openrisc/interrupt_helper.c |   3 +-
>>   target-openrisc/machine.c          |   3 +-
>>   target-openrisc/mmu.c              |   4 +-
>>   target-openrisc/sys_helper.c       |  74 ++++++--------
>>   target-openrisc/translate.c        | 201 ++++++++++++++++---------------------
>>   tests/tcg/openrisc/test_addc.c     |   8 +-
>>   tests/tcg/openrisc/test_addic.c    |  10 +-
>>   12 files changed, 175 insertions(+), 221 deletions(-)
>>
>> --
>> 1.8.4.1
>>
> Regards,
> Jia

  reply	other threads:[~2013-10-24 23:24 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-22  0:12 [Qemu-devel] [PATCH_v2 0/9] target-openrisc: Corrections and speed improvements Sebastian Macke
2013-10-22  0:12 ` [Qemu-devel] [PATCH_v2 1/9] target-openrisc: Speed up move instruction Sebastian Macke
2013-10-22  0:12 ` [Qemu-devel] [PATCH_v2 2/9] target-openrisc: Remove unnecessary code generated by jump instructions Sebastian Macke
2013-10-22  0:12 ` [Qemu-devel] [PATCH_v2 3/9] target-openrisc: Remove executable flag for every page Sebastian Macke
2013-10-22  0:12 ` [Qemu-devel] [PATCH_v2 4/9] target-openrisc: Correct wrong epcr register in interrupt handler Sebastian Macke
2013-10-22  0:12 ` [Qemu-devel] [PATCH_v2 5/9] openrisc-timer: Reduce overhead, Separate clock update functions Sebastian Macke
2013-10-22  0:12 ` [Qemu-devel] [PATCH_v2 6/9] target-openrisc: Correct memory bounds checking for the tlb buffers Sebastian Macke
2013-10-22  0:12 ` [Qemu-devel] [PATCH_v2 7/9] target-openrisc: Separate branch flag from Supervision register Sebastian Macke
2013-10-22  0:12 ` [Qemu-devel] [PATCH_v2 8/9] target-openrisc: Complete remove of npc and ppc variables Sebastian Macke
2013-10-22  0:12 ` [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flag check of l.addc and l.addic test cases Sebastian Macke
2013-10-22  8:35   ` [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flagcheck of l.addc and l.addic test casess Alex Bennée
2013-10-22 15:45     ` Sebastian Macke
2013-10-22 16:01       ` Max Filippov
2013-10-22 16:12         ` Alex Bennée
2013-10-22 16:15         ` Sebastian Macke
2013-10-23  6:52           ` Max Filippov
2013-10-23  3:47 ` [Qemu-devel] [PATCH_v2 0/9] target-openrisc: Corrections and speed improvements Jia Liu
2013-10-24 23:23   ` Sebastian Macke [this message]
2013-10-26  0:21     ` Jia Liu
2013-10-28  1:56       ` Sebastian Macke
2013-10-29  7:32         ` Jia Liu

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