From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49527) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VZlHh-0007Ty-B9 for qemu-devel@nongnu.org; Fri, 25 Oct 2013 13:35:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VZlHY-0003Cl-1x for qemu-devel@nongnu.org; Fri, 25 Oct 2013 13:34:53 -0400 Sender: Richard Henderson Message-ID: <526AABA0.5090908@twiddle.net> Date: Fri, 25 Oct 2013 10:34:24 -0700 From: Richard Henderson MIME-Version: 1.0 References: <526947CA.4020504@gmail.com> <526949E1.3010405@gmail.com> <5269852E.9000601@twiddle.net> <526A9B6A.7080001@gmail.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , Tom Musta Cc: "qemu-ppc@nongnu.org" , QEMU Developers On 10/25/2013 10:20 AM, Peter Maydell wrote: > Are you sure that doing the arithmetic with the softfloat 128 bit > float operations doesn't set the inexact flag anywhere it > shouldn't? (ie where the intermediate product is not exact in > 128 bit format but the final result is exact in 64 or 32 bits). The 128 bit multiply cannot given an inexact, and I believe that if the 128 bit addition gives inexact then the 64-bit fma result would also have inexact. r~